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[178.235.179.28]) by smtp.gmail.com with ESMTPSA id ka12-20020a170907920c00b00a26ac57b951sm6245712ejb.23.2023.12.27.14.17.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Dec 2023 14:17:38 -0800 (PST) From: Konrad Dybcio Date: Wed, 27 Dec 2023 23:17:20 +0100 Subject: [PATCH 2/4] PCI: qcom: Cache last icc bandwidth Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20231227-topic-8280_pcie-v1-2-095491baf9e4@linaro.org> References: <20231227-topic-8280_pcie-v1-0-095491baf9e4@linaro.org> In-Reply-To: <20231227-topic-8280_pcie-v1-0-095491baf9e4@linaro.org> To: Manivannan Sadhasivam , Bjorn Andersson , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Philipp Zabel , Stanimir Varbanov , Andrew Murray , Vinod Koul Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1703715452; l=1504; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=qF9x2W0s+UbihjgEpXNx/tQIgEfBt4CokexyeClTC+s=; b=Ut2csbDk7i4ucgHp6UiLrRct7RJZYvkH0BNoyJ8o1AoM6NSg7odFU8uAlhMsvQEgQQw386KHm heme3d3SgUKDZ8ZSDcx8Df6lN0kgFUqgL2+0+7MI/sZqxjzPzB0J705 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= In preparation for shutting down the RC, cache the last interconnect bandwidth vote to allow for icc tag setting. Signed-off-by: Konrad Dybcio --- drivers/pci/controller/dwc/pcie-qcom.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 1c5ab8c4ff39..a02dc197c495 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -240,6 +240,7 @@ struct qcom_pcie { struct phy *phy; struct gpio_desc *reset; struct icc_path *icc_mem; + u32 last_bw; const struct qcom_pcie_cfg *cfg; struct dentry *debugfs; bool suspended; @@ -1387,6 +1388,8 @@ static int qcom_pcie_icc_init(struct qcom_pcie *pcie) return ret; } + pcie->last_bw = QCOM_PCIE_LINK_SPEED_TO_BW(1); + return 0; } @@ -1415,6 +1418,8 @@ static void qcom_pcie_icc_update(struct qcom_pcie *pcie) dev_err(pci->dev, "failed to set interconnect bandwidth: %d\n", ret); } + + pcie->last_bw = width * QCOM_PCIE_LINK_SPEED_TO_BW(speed); } static int qcom_pcie_link_transition_count(struct seq_file *s, void *data) @@ -1578,6 +1583,8 @@ static int qcom_pcie_suspend_noirq(struct device *dev) return ret; } + pcie->last_bw = kBps_to_icc(1); + /* * Turn OFF the resources only for controllers without active PCIe * devices. For controllers with active devices, the resources are kept -- 2.43.0