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Date: Thu, 28 Dec 2023 11:50:53 +0000
From: Sudeep Holla <sudeep.holla@arm.com>
To: Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
	Bjorn Andersson <andersson@kernel.org>
Subject: Re: [PATCH 2/2] firmware/psci: Set
 pm_set_resume/suspend_via_firmware() on qcom
Message-ID: <20231228115053.zlypgc5uxxvghi4a@bogus>
References: <20231227-topic-psci_fw_sus-v1-0-6910add70bf3@linaro.org>
 <20231227-topic-psci_fw_sus-v1-2-6910add70bf3@linaro.org>
 <20231228102801.fzaubcjq5thfwgxg@bogus>
 <f34dd5de-9e56-4c58-b9bf-2356b41d17b1@linaro.org>
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In-Reply-To: <f34dd5de-9e56-4c58-b9bf-2356b41d17b1@linaro.org>

On Thu, Dec 28, 2023 at 12:47:51PM +0100, Konrad Dybcio wrote:
> On 28.12.2023 11:28, Sudeep Holla wrote:
> > On Wed, Dec 27, 2023 at 11:15:31PM +0100, Konrad Dybcio wrote:
> >> Most Qualcomm platforms implementing PSCI (ab)use CPU_SUSPEND for
> >> entering various stages of suspend, across the SoC. These range from a
> >> simple WFI to a full-fledged power collapse of the entire chip
> >> (mostly, anyway).
> >>
> >> Some device drivers are curious to know whether "the firmware" (which is
> >> often assumed to be ACPI) takes care of suspending or resuming the
> >> platform. Set the flag that reports this behavior on the aforementioned
> >> chips.
> >>
> >> Some newer Qualcomm chips ship with firmware that actually advertises
> >> PSCI SYSTEM_SUSPEND, so the compatible list should only grow slightly.
> >>
> > 
> > NACK, just use suspend-to-idle if SYSTEM_SUSPEND is not advertised. It is
> > designed for such platforms especially on x86/ACPI which don't advertise
> > Sx states. I see no reason why that doesn't work on ARM platforms as well.
>
> Not sure if I got the message through well, but the bottom line is, on
> Qualcomm platforms the "idle" states aren't actually just "idle" (read:
> they're not like S0ix). All but the most shallow ones shut down quite a
> chunk of the entire SoC, with the lowest ones being essentially S3 with
> power being cut off from the entire chip, except for the memory rail.
>

No I understood that and S2I is exactly what you need.
Have you checked if S2I already works as intended on these platforms ?
What extra do you achieve with this hack by advertising fake S2R ?
S2I will have less latency compared to S2R and the mem_sleep will be
automatically set to S2I if S2R is not supported, so no userspace impact
as well.

So please let us know what this change provide extra over S2I ? Until
then my NACK still stands.

--
Regards,
Sudeep