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Fri, 29 Dec 2023 18:59:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ixit.cz; s=dkim; t=1703872753; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:autocrypt:autocrypt; bh=5HyKDYiO6vxY7a0FUq1Nb+VTD+wtGLj25e2Ql+FTlwo=; b=10S7uPNeB8UyMiWW6ThjBwZdM/85rgTAS4i3lO2FzpcF5PvqAqdKRVjjbbGjuSNMudNKiU ybJgDPwoqtu5/ecjeol95hJ3+eQegzgzFnk79r+YmxJjU76Dt2BzIzk2md41k11/O1z3Pm yAu0nfBQQfMUpsiKvQo3UhlAvi51vwQ= Message-ID: <869df984-d3e8-4b2d-8724-6829e9c23269@ixit.cz> Date: Fri, 29 Dec 2023 18:59:11 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Beta Subject: Re: [PATCH v2 1/2] dt-bindings: PCI: qcom: adjust iommu-map for different SoC To: Manivannan Sadhasivam Cc: krzysztof.kozlowski@linaro.org, agross@kernel.org, andersson@kernel.org, bhelgaas@google.com, conor+dt@kernel.org, conor.dooley@microchip.com, devicetree@vger.kernel.org, konrad.dybcio@linaro.org, krzysztof.kozlowski+dt@linaro.org, kw@linux.com, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, lpieralisi@kernel.org, mani@kernel.org, robh@kernel.org References: <20231120070910.16697-1-krzysztof.kozlowski@linaro.org> <20231229171754.GD9098@thinkpad> Content-Language: en-US From: David Heidelberg Autocrypt: addr=david@ixit.cz; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29/12/2023 18:17, Manivannan Sadhasivam wrote: > On Fri, Dec 29, 2023 at 04:36:31PM +0100, David wrote: >>> + minItems: 1 >> Hello Krzysztof, >> >> the driver will accept 0 just fine, so I think this definition may be wrong. >> > It's not entirely wrong but the actual SID mapping differs between SoCs. Sure, I think I can live with this. > >> I sent just generic "dt-bindings: PCI: qcom: delimit number of iommu-map entries" which doesn't care about the numbers (in similar fashion as other bindings having iommu-map). >> > No, we should not just ignore the MAX limit. If you add number of entries > exceeding the max SID assigned to PCIe bus, it will fail. > > - Mani Make sense, thanks for explanation. Reviewed-by: David Heidelberg >> Tell me what you think. >> >> David >> -- David Heidelberg