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Message-ID: <8301e5b9-29fa-4c60-8694-335c63ae1883@linaro.org>
Date: Sun, 31 Dec 2023 00:28:37 +0100
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Subject: Re: [PATCH] arm64: dts: qcom: sdm845: add power domain to UFS phy
 interface
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To: David Heidelberg <david@ixit.cz>, Luca Weiss <luca@z3ntu.xyz>,
 Bjorn Andersson <andersson@kernel.org>,
 Konrad Dybcio <konrad.dybcio@linaro.org>, Rob Herring <robh+dt@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
 Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
 linux-kernel@vger.kernel.org, Manivannan Sadhasivam <mani@kernel.org>
References: <20231229202959.266502-1-david@ixit.cz>
 <2710291.mvXUDI8C0e@z3ntu.xyz> <e299a7bd-2f50-41e0-a638-a1fbbeb65635@ixit.cz>
From: Caleb Connolly <caleb.connolly@linaro.org>
In-Reply-To: <e299a7bd-2f50-41e0-a638-a1fbbeb65635@ixit.cz>
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Hi David,

Did you boot-test this?

On 30/12/2023 00:18, David Heidelberg wrote:
> On 29/12/2023 22:37, Luca Weiss wrote:
> 
>> On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote:
>>> Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb`
>>>
>>> Signed-off-by: David Heidelberg <david@ixit.cz>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>> b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb
>>> 100644
>>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>> @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 {
>>>               clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
>>>                    <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
>>>
>>> +            power-domains = <&gcc UFS_PHY_GDSC>;
>>> +
>>>               resets = <&ufs_mem_hc 0>;
>>>               reset-names = "ufsphy";
>> This is potentially the wrong power domain, see the conversation here:
>> https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/
> Thanks, I was thinking about  SDM845_MX, but then looked at rest more 
> closer qcom archs and thought it'll be likely GDSC (also by looking at 
> ufs_mem_hc reset vectors).
>>
>> Hopefully Mani can give some input here :)
>>
>> Regards
>> Luca
>>
>>

-- 
// Caleb (they/them)