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Mon, 01 Jan 2024 21:17:38 -0800 (PST) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id r25-20020ac252b9000000b0050e810689e5sm2081827lfm.33.2024.01.01.21.17.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Jan 2024 21:17:38 -0800 (PST) From: Dmitry Baryshkov Date: Tue, 02 Jan 2024 07:17:37 +0200 Subject: [PATCH v7 17/22] ARM: dts: qcom: apq8064: declare SAW2 regulators Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240102-saw2-spm-regulator-v7-17-0472ec237f49@linaro.org> References: <20240102-saw2-spm-regulator-v7-0-0472ec237f49@linaro.org> In-Reply-To: <20240102-saw2-spm-regulator-v7-0-0472ec237f49@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Andy Gross Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1968; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=HGYqjIJyAD2GI/gXSq7W4K6RgkmqlA4A/at5d+w6bVs=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlk5xlXn3k4uN5ZQvh0l66H+bmn4ilr4RrDKOz4 AyYZ1y77reJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZOcZQAKCRCLPIo+Aiko 1VAuB/0VEiepNlkGn/4TrJBSQmLhw8eSqmdu8d1tuWQ9s8d/IOP/DyFfaeEaKSfE0QE4M5reTF2 /8BT2UygBIRTKzBzQ+9AWaRzIA697H8grZ1tPDBeof3wuwj2DH+kzYUmaTwaET09XunitZz++Ws Xn477PbbjoxeasqJKZdcAgfJKN5kwQ6uLWTNKa/VPWzaPj0b1sq7BvzBpPLTre8nnbK4QQ6xq1m fdyfgvpG0UL4aNw4mI/WEK4H2ja0qo0JLfEau/blDsheQzu9tWkgthobcsUtiF+cx4BBuGuyVZC TNp7FWzSRAoPMVVi+J8MmbZjtQWJs8GW/mKXHx4n8D1sBGyM X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The SAW2 (SPM and AVS Wrapper) among other things is yet another way to handle CPU-related PMIC regulators. Provide a way to control voltage of these regulators. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi index 3066ee49daa7..d1cbd2248558 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi @@ -368,25 +368,41 @@ acc3: clock-controller@20b8000 { saw0: power-manager@2089000 { compatible = "qcom,apq8064-saw2-v1.1-cpu", "qcom,saw2"; reg = <0x02089000 0x1000>, <0x02009000 0x1000>; - regulator; + + saw0_vreg: regulator { + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1300000>; + }; }; saw1: power-manager@2099000 { compatible = "qcom,apq8064-saw2-v1.1-cpu", "qcom,saw2"; reg = <0x02099000 0x1000>, <0x02009000 0x1000>; - regulator; + + saw1_vreg: regulator { + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1300000>; + }; }; saw2: power-manager@20a9000 { compatible = "qcom,apq8064-saw2-v1.1-cpu", "qcom,saw2"; reg = <0x020a9000 0x1000>, <0x02009000 0x1000>; - regulator; + + saw2_vreg: regulator { + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1300000>; + }; }; saw3: power-manager@20b9000 { compatible = "qcom,apq8064-saw2-v1.1-cpu", "qcom,saw2"; reg = <0x020b9000 0x1000>, <0x02009000 0x1000>; - regulator; + + saw3_vreg: regulator { + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1300000>; + }; }; sps_sic_non_secure: sps-sic-non-secure@12100000 { -- 2.39.2