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X-OriginatorOrg: duagon.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jan 2024 08:19:22.3218 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b40c304d-b95d-4f60-4a2e-08dc0b6b8687 X-MS-Exchange-CrossTenant-Id: e5e7e96e-8a28-45d6-9093-a40dd5b51a57 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5e7e96e-8a28-45d6-9093-a40dd5b51a57;Ip=[194.38.86.34];Helo=[securemail.duagon.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B94.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV0P278MB1079 The value written to the register AM65_CPSW_PORT_REG_RX_MAXLEN is currently fixed to what AM65_CPSW_MAX_PACKET_SIZE defines. This patch prepares the driver so that the maximum received frame length can be configured in future updates. Signed-off-by: Jorge Sanjuan Garcia --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 13 ++++++++----- drivers/net/ethernet/ti/am65-cpsw-nuss.h | 2 ++ 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/etherne= t/ti/am65-cpsw-nuss.c index 378d69b8cb14..a920146d7a60 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -151,9 +151,11 @@ static void am65_cpsw_port_set_sl_mac(struct am65_cpsw= _port *slave, =20 static void am65_cpsw_sl_ctl_reset(struct am65_cpsw_port *port) { + struct am65_cpsw_common *common =3D port->common; + cpsw_sl_reset(port->slave.mac_sl, 100); /* Max length register has to be restored after MAC SL reset */ - writel(AM65_CPSW_MAX_PACKET_SIZE, + writel(common->rx_packet_max, port->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN); } =20 @@ -455,7 +457,7 @@ static int am65_cpsw_nuss_common_open(struct am65_cpsw_= common *common) AM65_CPSW_CTL_VLAN_AWARE | AM65_CPSW_CTL_P0_RX_PAD, common->cpsw_base + AM65_CPSW_REG_CTL); /* Max length register */ - writel(AM65_CPSW_MAX_PACKET_SIZE, + writel(common->rx_packet_max, host_p->port_base + AM65_CPSW_PORT_REG_RX_MAXLEN); /* set base flow_id */ writel(common->rx_flow_id_base, @@ -507,7 +509,7 @@ static int am65_cpsw_nuss_common_open(struct am65_cpsw_= common *common) =20 for (i =3D 0; i < common->rx_chns.descs_num; i++) { skb =3D __netdev_alloc_skb_ip_align(NULL, - AM65_CPSW_MAX_PACKET_SIZE, + common->rx_packet_max, GFP_KERNEL); if (!skb) { ret =3D -ENOMEM; @@ -848,7 +850,7 @@ static int am65_cpsw_nuss_rx_packets(struct am65_cpsw_c= ommon *common, =20 k3_cppi_desc_pool_free(rx_chn->desc_pool, desc_rx); =20 - new_skb =3D netdev_alloc_skb_ip_align(ndev, AM65_CPSW_MAX_PACKET_SIZE); + new_skb =3D netdev_alloc_skb_ip_align(ndev, common->rx_packet_max); if (new_skb) { ndev_priv =3D netdev_priv(ndev); am65_cpsw_nuss_set_offload_fwd_mark(skb, ndev_priv->offload_fwd_mark); @@ -2196,7 +2198,7 @@ am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common= *common, u32 port_idx) eth_hw_addr_set(port->ndev, port->slave.mac_addr); =20 port->ndev->min_mtu =3D AM65_CPSW_MIN_PACKET_SIZE; - port->ndev->max_mtu =3D AM65_CPSW_MAX_PACKET_SIZE - + port->ndev->max_mtu =3D common->rx_packet_max - (VLAN_ETH_HLEN + ETH_FCS_LEN); port->ndev->hw_features =3D NETIF_F_SG | NETIF_F_RXCSUM | @@ -2926,6 +2928,7 @@ static int am65_cpsw_nuss_probe(struct platform_devic= e *pdev) return -ENOENT; =20 common->rx_flow_id_base =3D -1; + common->rx_packet_max =3D AM65_CPSW_MAX_PACKET_SIZE; init_completion(&common->tdown_complete); common->tx_ch_num =3D AM65_CPSW_DEFAULT_TX_CHNS; common->pf_p0_rx_ptype_rrobin =3D false; diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.h b/drivers/net/etherne= t/ti/am65-cpsw-nuss.h index f3dad2ab9828..141160223d73 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.h +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.h @@ -130,6 +130,8 @@ struct am65_cpsw_common { u32 tx_ch_rate_msk; u32 rx_flow_id_base; =20 + int rx_packet_max; + struct am65_cpsw_tx_chn tx_chns[AM65_CPSW_MAX_TX_QUEUES]; struct completion tdown_complete; atomic_t tdown_cnt; --=20 2.34.1