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[87.21.250.146]) by smtp.gmail.com with ESMTPSA id i16-20020a05600c355000b0040d5a5c523csm25317030wmq.1.2024.01.02.02.08.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 02:08:35 -0800 (PST) Message-ID: <6593e0a3.050a0220.5c543.8e12@mx.google.com> X-Google-Original-Message-ID: Date: Tue, 2 Jan 2024 11:08:34 +0100 From: Christian Marangi To: "Russell King (Oracle)" Cc: Jie Luo , Andrew Lunn , davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, hkallweit1@gmail.com, corbet@lwn.net, p.zabel@pengutronix.de, f.fainelli@gmail.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Subject: Re: [PATCH v8 14/14] dt-bindings: net: ar803x: add qca8084 PHY properties References: <60b9081c-76fa-4122-b7ae-5c3dcf7229f9@lunn.ch> <7c05b08a-bb6d-4fa1-8cee-c1051badc9d9@lunn.ch> <6abe5d6f-9d00-445f-8c81-9c89b9da3e0a@quicinc.com> <1bddd434-024c-45ff-9866-92951a3f555f@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Tue, Jan 02, 2024 at 09:57:48AM +0000, Russell King (Oracle) wrote: > On Mon, Dec 18, 2023 at 11:01:03AM +0800, Jie Luo wrote: > > > > > > On 12/17/2023 12:09 AM, Russell King (Oracle) wrote: > > > On Sat, Dec 16, 2023 at 10:41:28PM +0800, Jie Luo wrote: > > > > > > > > > > > > On 12/16/2023 9:51 PM, Russell King (Oracle) wrote: > > > > > On Sat, Dec 16, 2023 at 11:21:53AM +0100, Andrew Lunn wrote: > > > > > > > The following is the chip package, the chip can work on the switch mode > > > > > > > like the existed upstream code qca8k, where PHY1-PHY4 is connected with > > > > > > > MAC1-MAC4 directly; > > > > > > > > > > > > Ah, that is new information, and has a big effect on the design. > > > > > > > > > > This QCA8084 that's being proposed in these patches is not a PHY in > > > > > itself, but is a SoC. I came across this: > > > > > > > > > > https://www.rt-rk.com/android-tv-solution-tv-in-smartphone-pantsstb-based-on-qualcomm-soc-design/ > > > > > > > > The chip mentioned in the link you mentioned is SoC, which is not the > > > > chip that the qca8084 driver work for. > > > > > > So there's two chips called QCA8084 both produced by Qualcomm? I find > > > that hard to believe. > > > > > > > The SoC mentioned in the link you provided is the APQ8084 that is introduced > > in the link below: > > https://www.qualcomm.com/products/mobile/snapdragon/smartphones/snapdragon-8-series-mobile-platforms/snapdragon-processors-805 > > So the one mentioned in the rt-rk article and a load of CVEs is _not_ > QCA8084 but is APQ8084. Sounds like a lot of people are getting stuff > wrong - which is hardly surprising as there are people that seem to > _enjoy_ getting the technical details wrong. I haven't worked out if > it's intentional malace, or they're just fundamentally lazy individuals > who just like to screw with other people. > > Sigh. > Hoping to give some clarification with the naming. - APQ8084 ("Application" SoC for 8084 family) - IPQ8084 ("Internet" SoC version of APQ8084) - QCA8084 (Integrated PHYs in the IPQ8084 SoC) I guess? Considering QCA8084 is only in in IPQ8084 SoC, the confusion with referring to it is in the fact that it's all the same thing, and everything related to APQ is also related to IPQ since they are the same SoC with minor difference (different DSP, presence of NSS cores) I can totally see sencente like "The IPQ8084 PHYs..." referencing the QCA8084 PHY. (Just to put how the naming is confusing there are PMIC with the same exact naming) -- Ansuel