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[147.75.80.249]) by mx.google.com with ESMTPS id bx24-20020a170906a1d800b00a235974814esi11130340ejb.456.2024.01.02.16.53.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 16:53:50 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-15015-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ainNOmnH; spf=pass (google.com: domain of linux-kernel+bounces-15015-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-15015-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 677531F2358D for ; Wed, 3 Jan 2024 00:53:50 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 064ED4A10; Wed, 3 Jan 2024 00:53:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ainNOmnH" X-Original-To: linux-kernel@vger.kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 319EE1FBA; Wed, 3 Jan 2024 00:53:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8EA81C433C7; Wed, 3 Jan 2024 00:53:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1704243184; bh=aGZnPvr4auoaajRItapwmxnfamYJ7VBP+86V+sLoGb4=; h=In-Reply-To:References:Subject:From:To:Date:From; b=ainNOmnHtaaIJl0KzcZotI236oO9X74rU4MkN06uP8GnxgYcAfDwYGG+xHhcTDfDN 59Ts0/btu//SjYmKXBxs8gxnoPhq0JGXFBc8hoVJ7xbJzbn9B+CZAkkatU0yGU8qbx Ru1Wdny1bVPm9nVDPWQCrksx1laTwYFp846LE05rpRZP3MB96N3mYnzHFsMcNGiPt1 A/QIzLXl+9QsZm7GTRR3MYuk/gfFxWDcMjVhcCmBm9pspOxL+efu2RfuJUtmEVVIND bPLPuC+pCg5MmSACZXozS6mIeo/BjOTmX/26D98814JBqQXLTgwhu+RNCH1V7+gqbq 7xTw81vDMx09Q== Message-ID: Content-Type: text/plain; charset="utf-8" Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <3b9c65ddb08c8bedf790aacf29871af026b6f0b7.1702849494.git.daniel@makrotopia.org> References: <27f99db432e9ccc804cc5b6501d7d17d72cae879.1702849494.git.daniel@makrotopia.org> <3b9c65ddb08c8bedf790aacf29871af026b6f0b7.1702849494.git.daniel@makrotopia.org> Subject: Re: [PATCH v7 4/5] clk: mediatek: add pcw_chg_bit control for PLLs of MT7988 From: Stephen Boyd To: AngeloGioacchino Del Regno , Chen-Yu Tsai , Conor Dooley , Dan Carpenter , Daniel Golle , David S. Miller , Eric Dumazet , Frank Wunderlich , Garmin.Chang , Jakub Kicinski , James Liao , Krzysztof Kozlowski , Matthias Brugger , Michael Turquette , Paolo Abeni , Philipp Zabel , Rob Herring , Sabrina Dubroca , Sam Shih , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, netdev@vger.kernel.org Date: Tue, 02 Jan 2024 16:53:02 -0800 User-Agent: alot/0.10 Quoting Daniel Golle (2023-12-17 13:50:07) > From: Sam Shih >=20 > Introduce pcw_chg_bit member to struct mtk_pll_data and use it instead > of the previously hardcoded PCW_CHG_MASK macro if set. > This will needed for clocks on the MT7988 SoC. >=20 > Signed-off-by: Sam Shih > Signed-off-by: Daniel Golle > Reviewed-by: AngeloGioacchino Del Regno > --- Applied to clk-next