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Miller" , Eric Dumazet , "Jakub Kicinski" , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "netdev@vger.kernel.org" , "devicetree@vger.kernel.org" , Teoh Ji Sheng Subject: RE: [PATCH net-next v1 3/4] net: stmmac: Add support for TX/RX channel interrupt Thread-Topic: [PATCH net-next v1 3/4] net: stmmac: Add support for TX/RX channel interrupt Thread-Index: AQHaNJox4jd+E/aBcUiXrRKS2mOw+bC12C8AgBHyAHA= Date: Wed, 3 Jan 2024 07:57:23 +0000 Message-ID: References: <20231222054451.2683242-1-leong.ching.swee@intel.com> <20231222054451.2683242-4-leong.ching.swee@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: CH0PR11MB5490:EE_|BN9PR11MB5337:EE_ x-ms-office365-filtering-correlation-id: d110b593-97ba-4e44-359c-08dc0c319e82 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CH0PR11MB5490.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d110b593-97ba-4e44-359c-08dc0c319e82 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Jan 2024 07:57:23.1675 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 7g7aEZKYlFE9+1sHvQ/nLVDM26zyyfqUBp42atoj1KJ3idJYmyIbrBYJliIw8D3ND4r2rvB2uAU1QZZ73sYhV7oZmzlxReSNfXTtDw6CpJs= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR11MB5337 X-OriginatorOrg: intel.com > -----Original Message----- > From: Serge Semin > Sent: Saturday, December 23, 2023 5:49 AM > To: Swee, Leong Ching > Cc: Maxime Coquelin ; Alexandre Torgue > ; Jose Abreu ; > David S . Miller ; Eric Dumazet > ; Jakub Kicinski ; Paolo Abeni > ; Rob Herring ; Krzysztof > Kozlowski ; Conor Dooley > ; Giuseppe Cavallaro ; > linux-stm32@st-md-mailman.stormreply.com; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > netdev@vger.kernel.org; devicetree@vger.kernel.org; Teoh Ji Sheng > > Subject: Re: [PATCH net-next v1 3/4] net: stmmac: Add support for TX/RX > channel interrupt >=20 > On Fri, Dec 22, 2023 at 01:44:50PM +0800, Leong Ching Swee wrote: > > From: Swee Leong Ching > > > > Enable TX/RX channel interrupt registration for MAC that interrupts > > CPU through shared peripheral interrupt (SPI). > > > > Per channel interrupts and interrupt-names are registered through, > > Eg: 4 tx and 4 rx channels: > > interrupts =3D , > > , > > , > > ; > > ; > > ; > > ; > > ; interrupt-names =3D > > "dma_tx0", > > "dma_tx1", > > "dma_tx2", > > "dma_tx3", > > "dma_rx0", > > "dma_rx1", > > "dma_rx2", > > "dma_rx3"; > > > > Signed-off-by: Teoh Ji Sheng > > Signed-off-by: Swee Leong Ching > > --- > > .../ethernet/stmicro/stmmac/stmmac_platform.c | 24 > > +++++++++++++++++++ > > 1 file changed, 24 insertions(+) > > > > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c > > b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c > > index 70eadc83ca68..f857907f13a0 100644 > > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c > > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c > > @@ -710,6 +710,8 @@ > EXPORT_SYMBOL_GPL(devm_stmmac_probe_config_dt); > > int stmmac_get_platform_resources(struct platform_device *pdev, > > struct stmmac_resources *stmmac_res) { >=20 > > + char irq_name[8]; >=20 > By DW XGMAC v2.x IP-core design there can be up to 16 Tx channels and > 12 Rx channels. Thus it's better to set irq_name size being at least > (strlen("dma_tx16") + 1) =3D=3D 9 beforehand since you are adding this co= de > anyway and for some reason didn't consider to pick the Jisheng' > patch up which fixed the MTL_MAX_TX_QUEUES/MTL_MAX_RX_QUEUES > macros. >=20 I only have 8 channels tx/rx dma irq setup, so I could not test 16 channels Patch. Will update to 9 in v2. > > + int i; >=20 > Please add an empty line between the variables declaration and the next > statement. >=20 Thanks. Will update this in v2. > > memset(stmmac_res, 0, sizeof(*stmmac_res)); > > > > /* Get IRQ information early to have an ability to ask for deferred > > @@ -719,6 +721,28 @@ int stmmac_get_platform_resources(struct > platform_device *pdev, > > if (stmmac_res->irq < 0) > > return stmmac_res->irq; > > >=20 > > + /* For RX Channel */ > > + for (i =3D 0; i < MTL_MAX_RX_QUEUES; i++) { > > + snprintf(irq_name, sizeof(irq_name), "dma_rx%i", i); > > + stmmac_res->rx_irq[i] =3D > platform_get_irq_byname_optional(pdev, irq_name); > > + if (stmmac_res->rx_irq[i] < 0) { > > + if (stmmac_res->rx_irq[i] =3D=3D -EPROBE_DEFER) > > + return -EPROBE_DEFER; > > + break; > > + } > > + } >=20 > What about: >=20 > + /* Get optional Tx/Rx DMA per-channel IRQs, which otherwise > + * are supposed to be delivered via the common MAC IRQ line > + */ > + for (i =3D 0; i < MTL_MAX_RX_QUEUES; i++) { > + snprintf(irq_name, sizeof(irq_name), "dma_rx%i", i); > + irq =3D platform_get_irq_byname_optional(pdev, irq_name); > + if (irq =3D=3D -EPROBE_DEFER) > + return irq; > + else if (irq < 0) > + break; > + > + stmmac_res->rx_irq[i] =3D irq; > + } >=20 > It's cleaner a bit with less indentations and doesn't pollute rx_irq[]/tx= _irq[] > arrays with the error numbers. >=20 Sure, will update this in v2. > > + > > + /* For TX Channel */ > > + for (i =3D 0; i < MTL_MAX_TX_QUEUES; i++) { > > + snprintf(irq_name, sizeof(irq_name), "dma_tx%i", i); > > + stmmac_res->tx_irq[i] =3D > platform_get_irq_byname_optional(pdev, irq_name); > > + if (stmmac_res->tx_irq[i] < 0) { > > + if (stmmac_res->rx_irq[i] =3D=3D -EPROBE_DEFER) > > + return -EPROBE_DEFER; > > + break; > > + } > > + } > > + >=20 > Please move the Tx/Rx IRQs getting loops to the bottom of the > stmmac_get_platform_resources() method. Thus the order of the IRQs > getting would be the same as the order of the IRQs requests implemented i= n > the stmmac_request_irq_multi_msi() and > stmmac_request_irq_single() methods. >=20 > -Serge(y) >=20 Will move those methods to bottom in v2. > > /* On some platforms e.g. SPEAr the wake up irq differs from the > mac irq > > * The external wake up irq can be passed through the platform code > > * named as "eth_wake_irq" > > -- > > 2.34.1 > > > >