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References: <20231229074508.2709093-1-JJLIU0@nuvoton.com>
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From: Bartosz Golaszewski <brgl@bgdev.pl>
Date: Wed, 3 Jan 2024 11:26:07 +0100
Message-ID: <CAMRc=McNDMBXebq_KC50F4XaXrFTCw6+GQqNmhbzPQ=2oGpLzQ@mail.gmail.com>
Subject: Re: [PATCH v10 0/3] Add Nuvoton NPCM SGPIO feature
To: jim.t90615@gmail.com
Cc: JJLIU0@nuvoton.com, KWLIU@nuvoton.com, linus.walleij@linaro.org, 
	andy@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, 
	conor+dt@kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, 
	linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org
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On Fri, Dec 29, 2023 at 8:45=E2=80=AFAM <jim.t90615@gmail.com> wrote:
>
> From: Jim Liu <JJLIU0@nuvoton.com>
>
> This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC.
> Nuvoton NPCM SGPIO module is combine serial to parallel IC (HC595)
> and parallel to serial IC (HC165), and use APB3 clock to control it.
> This interface has 4 pins  (D_out , D_in, S_CLK, LDSH).
> NPCM7xx/NPCM8xx have two sgpio module each module can support up
> to 64 output pins,and up to 64 input pin, the pin is only for GPI or GPO.
>
> Jim Liu (3):
>   dt-bindings: gpio: add NPCM sgpio driver bindings
>   arm: dts: nuvoton: npcm: Add sgpio feature
>   gpio: nuvoton: Add Nuvoton NPCM sgpio driver
>
>  .../bindings/gpio/nuvoton,sgpio.yaml          |  87 +++
>  .../dts/nuvoton/nuvoton-common-npcm7xx.dtsi   |  24 +
>  drivers/gpio/Kconfig                          |   7 +
>  drivers/gpio/Makefile                         |   1 +
>  drivers/gpio/gpio-npcm-sgpio.c                | 612 ++++++++++++++++++
>  5 files changed, 731 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/gpio/nuvoton,sgpio.=
yaml
>  create mode 100644 drivers/gpio/gpio-npcm-sgpio.c
>
> --
> 2.25.1
>

Applied patches 1 and 3.

Bart