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[2604:1380:45d1:ec00::1]) by mx.google.com with ESMTPS id o20-20020a05622a139400b004281dd38d60si7242756qtk.331.2024.01.03.09.28.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jan 2024 09:28:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-15799-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=i176oH0k; spf=pass (google.com: domain of linux-kernel+bounces-15799-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-15799-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id E651D1C214A4 for ; Wed, 3 Jan 2024 17:28:31 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 29F801C2A3; Wed, 3 Jan 2024 17:28:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b="i176oH0k" X-Original-To: linux-kernel@vger.kernel.org Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 427021C283; Wed, 3 Jan 2024 17:28:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.helo=mx0b-0016f401.pphosted.com Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 4037XSmF020422; Wed, 3 Jan 2024 09:28:13 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=1RB523u/YzFg6ojBTR5PfGAHwNn7BQfV7Lfr+ultk7I=; b=i17 6oH0kJS+QBk/IYvdI6lLLppu6PdLqitmuCX+X12PqRPgWcnYVsCxtYqv2XnwA3wL 9kYo8rxmTu6DB48s/693jywZCECOmqqU+nFnU+EvY2fEZqCPhHWEBxIei0mQfhYW U9XWFqaIz3k17t3PecfOOtxqDPIj1Fo7777h7hjmKMLH8NlbxJgf+V8o09pomkKR NG//MqKzQoGfpVj9QuSqUPLy2p4YaiL1DZ0SKz2rzfYkC2PnDzxeB2Aiq4Tzegb7 4hsYTBxNFDmJ1jGAFPRGNJ+FPJrIroG9857LJQbRjW0u/jOtoP015fLZYuZ7pnBm 5kXBzTzqH75hAxXH1rQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3vd39qadtu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 03 Jan 2024 09:28:13 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 3 Jan 2024 09:28:11 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 3 Jan 2024 09:28:11 -0800 Received: from dc3lp-swdev041.marvell.com (dc3lp-swdev041.marvell.com [10.6.60.191]) by maili.marvell.com (Postfix) with ESMTP id 29F705B6931; Wed, 3 Jan 2024 09:28:07 -0800 (PST) From: Elad Nachman To: , , , , , , , , , , , CC: Subject: [PATCH v2 1/2] dt-bindings: mmc: add Marvell ac5 Date: Wed, 3 Jan 2024 19:28:02 +0200 Message-ID: <20240103172803.1826113-2-enachman@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240103172803.1826113-1-enachman@marvell.com> References: <20240103172803.1826113-1-enachman@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: NfWS2ua3aNYgD7XOY9qGhS1C9f2M5O7L X-Proofpoint-GUID: NfWS2ua3aNYgD7XOY9qGhS1C9f2M5O7L X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02 From: Elad Nachman Add dt bindings for Marvell AC5/X/IM eMMC controller. This compatibility string covers the differences in the AC5/X version of the driver: 31-bit bus limitation and DDR memory starting at address 0x2_0000_0000, which are handled by usage of a bounce buffer plus a different DMA mask. Signed-off-by: Elad Nachman --- .../devicetree/bindings/mmc/marvell,xenon-sdhci.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml index 3a8e74894ae0..cfe6237716f4 100644 --- a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml @@ -27,7 +27,9 @@ properties: - marvell,armada-ap806-sdhci - items: - - const: marvell,armada-ap807-sdhci + - enum: + - marvell,armada-ap807-sdhci + - marvell,ac5-sdhci - const: marvell,armada-ap806-sdhci - items: -- 2.25.1