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Message-ID: <ac9916a9-d83e-46e4-8dee-ecc15775e94c@intel.com>
Date: Wed, 3 Jan 2024 10:38:14 -0800
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v2 2/2] x86/resctrl: Remove hard-coded memory bandwidth
 event configuration
To: <babu.moger@amd.com>, <corbet@lwn.net>, <fenghua.yu@intel.com>,
	<tglx@linutronix.de>, <mingo@redhat.com>, <bp@alien8.de>,
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CC: <x86@kernel.org>, <hpa@zytor.com>, <paulmck@kernel.org>,
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References: <20231201005720.235639-1-babu.moger@amd.com>
 <170240414535.760665.1609957728181418569.stgit@bmoger-ubuntu>
 <d9f3d23d-aba7-4229-bddb-5d6801b22f27@intel.com>
 <978719d8-8492-47f8-afdf-09e7c997b0b3@amd.com>
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From: Reinette Chatre <reinette.chatre@intel.com>
In-Reply-To: <978719d8-8492-47f8-afdf-09e7c997b0b3@amd.com>
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Hi Babu,

On 1/2/2024 12:00 PM, Moger, Babu wrote:
> On 12/14/23 19:24, Reinette Chatre wrote:
>> On 12/12/2023 10:02 AM, Babu Moger wrote:

>>> diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c
>>> index f136ac046851..30bf919edfda 100644
>>> --- a/arch/x86/kernel/cpu/resctrl/monitor.c
>>> +++ b/arch/x86/kernel/cpu/resctrl/monitor.c
>>> @@ -813,6 +813,12 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *r)
>>>  		return ret;
>>>  
>>>  	if (rdt_cpu_has(X86_FEATURE_BMEC)) {
>>> +		u32 eax, ebx, ecx, edx;
>>> +
>>> +		/* Detect list of bandwidth sources that can be tracked */
>>> +		cpuid_count(0x80000020, 3, &eax, &ebx, &ecx, &edx);
>>> +		hw_res->event_mask = ecx;
>>> +
>>
>> This has the same issue as I mentioned in V1. Note that this treats
>> reserved bits as valid values. I think this is a risky thing to do. For example
>> when this code is run on future hardware the currently reserved bits may have
>> values with different meaning than what this code uses it for.
> 
> Sure. Will use the mask MAX_EVT_CONFIG_BITS.
>               hw_res->mbm_cfg_mask = ecx &  MAX_EVT_CONFIG_BITS;
> 
>>
>>>  		if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) {
>>>  			mbm_total_event.configurable = true;
>>>  			mbm_config_rftype_init("mbm_total_bytes_config");
>>> diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
>>> index 69a1de92384a..8a1e9fdab974 100644
>>> --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
>>> +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
>>> @@ -1537,17 +1537,14 @@ static void mon_event_config_read(void *info)
>>>  {
>>>  	struct mon_config_info *mon_info = info;
>>>  	unsigned int index;
>>> -	u64 msrval;
>>> +	u32 h;
>>>  
>>>  	index = mon_event_config_index_get(mon_info->evtid);
>>>  	if (index == INVALID_CONFIG_INDEX) {
>>>  		pr_warn_once("Invalid event id %d\n", mon_info->evtid);
>>>  		return;
>>>  	}
>>> -	rdmsrl(MSR_IA32_EVT_CFG_BASE + index, msrval);
>>> -
>>> -	/* Report only the valid event configuration bits */
>>> -	mon_info->mon_config = msrval & MAX_EVT_CONFIG_BITS;
>>> +	rdmsr(MSR_IA32_EVT_CFG_BASE + index, mon_info->mon_config, h);
>>
>> I do not think this code needed to be changed. We do not want to treat
>> reserved bits as valid values. 
> 
> The logic is still the same. We don't have access to rdt_hw_resource in
> this function. So, I just moved the masking to mbm_config_show while printing.

Why do you need access to rdt_hw_resource? This comment is not about the bandwidth
events supported by the device but instead the bits used to represent these events.
This is the same issue as in rdt_get_mon_l3_config. The above change returns
reserved bits as valid while the original code ensured that only bits used for
field are returned (through the usage of MAX_EVT_CONFIG_BITS).

Reinette