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From: "Shradha Todi" <shradha.t@samsung.com>
To: "'Manivannan Sadhasivam'" <manivannan.sadhasivam@linaro.org>
Cc: <lpieralisi@kernel.org>, <kw@linux.com>, <robh@kernel.org>,
	<bhelgaas@google.com>, <jingoohan1@gmail.com>,
	<gustavo.pimentel@synopsys.com>, <josh@joshtriplett.org>,
	<lukas.bulwahn@gmail.com>, <hongxing.zhu@nxp.com>,
	<pankaj.dubey@samsung.com>, <linux-kernel@vger.kernel.org>,
	<linux-pci@vger.kernel.org>
In-Reply-To: 
Subject: RE: [PATCH v2 0/3] Add support for RAS DES feature in PCIe DW
 controller
Date: Wed, 3 Jan 2024 11:13:20 +0530
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References: <CGME20231130115055epcas5p4e29befa80877be45dbee308846edc0ba@epcas5p4.samsung.com>
	<20231130115044.53512-1-shradha.t@samsung.com>
	<20231130165514.GW3043@thinkpad> 


> -----Original Message-----
> From: Shradha Todi <shradha.t=40samsung.com>
> Sent: 04 December 2023 14:10
> To: 'Manivannan Sadhasivam' <manivannan.sadhasivam=40linaro.org>
> Cc: 'lpieralisi=40kernel.org' <lpieralisi=40kernel.org>; 'kw=40linux.com'
> <kw=40linux.com>; 'robh=40kernel.org' <robh=40kernel.org>;
> 'bhelgaas=40google.com' <bhelgaas=40google.com>; 'jingoohan1=40gmail.com'
> <jingoohan1=40gmail.com>; 'gustavo.pimentel=40synopsys.com'
> <gustavo.pimentel=40synopsys.com>; 'josh=40joshtriplett.org'
> <josh=40joshtriplett.org>; 'lukas.bulwahn=40gmail.com'
> <lukas.bulwahn=40gmail.com>; 'hongxing.zhu=40nxp.com'
> <hongxing.zhu=40nxp.com>; 'pankaj.dubey=40samsung.com'
> <pankaj.dubey=40samsung.com>; 'linux-kernel=40vger.kernel.org' <linux-
> kernel=40vger.kernel.org>; 'linux-pci=40vger.kernel.org' <linux-
> pci=40vger.kernel.org>
> Subject: RE: =5BPATCH v2 0/3=5D Add support for RAS DES feature in PCIe D=
W
> controller
>=20
>=20
>=20
> > -----Original Message-----
> > From: Manivannan Sadhasivam =5Bmailto:manivannan.sadhasivam=40linaro.or=
g=5D
> > Sent: 30 November 2023 22:25
> > To: Shradha Todi <shradha.t=40samsung.com>
> > Cc: lpieralisi=40kernel.org; kw=40linux.com; robh=40kernel.org;
> > bhelgaas=40google.com; jingoohan1=40gmail.com;
> > gustavo.pimentel=40synopsys.com; josh=40joshtriplett.org;
> > lukas.bulwahn=40gmail.com; hongxing.zhu=40nxp.com;
> > pankaj.dubey=40samsung.com; linux-kernel=40vger.kernel.org; linux-
> > pci=40vger.kernel.org
> > Subject: Re: =5BPATCH v2 0/3=5D Add support for RAS DES feature in PCIe=
 DW
> > controller
> >
> > On Thu, Nov 30, 2023 at 05:20:41PM +0530, Shradha Todi wrote:
> > > DesignWare controller provides a vendor specific extended capability
> > > called RASDES as an IP feature. This extended capability  provides
> > > hardware information like:
> > >  - Debug registers to know the state of the link or controller.
> > >  - Error injection mechanisms to inject various PCIe errors including
> > >    sequence number, CRC
> > >  - Statistical counters to know how many times a particular event
> > >    occurred
> > >
> > > However, in Linux we do not have any generic or custom support to be
> > > able to use this feature in an efficient manner. This is the reason
> > > we are proposing this framework. Debug and bring up time of
> > > high-speed IPs are highly dependent on costlier hardware analyzers
> > > and this solution will in some ways help to reduce the HW analyzer us=
age.
> > >
> > > The debugfs entries can be used to get information about underlying
> > > hardware and can be shared with user space. Separate debugfs entries
> > > has been created to cater to all the DES hooks provided by the contro=
ller.
> > > The debugfs entries interacts with the RASDES registers in the
> > > required sequence and provides the meaningful data to the user. This
> > > eases the effort to understand and use the register information for
> > debugging.
> > >
> > > v1 version was posted long back and for some reasons I couldn't work
> > > on it. I apologize for the long break. I'm restarting this activity
> > > and have taken care of all previous review comments shared.
> > > v1:
> > > https://lore.kernel.org/all/20210518174618.42089-1-shradha.t=40samsun=
g
> > > .c
> > > om/T/
> > >
> >
> > There is already a series floating to add similar functionality via
> > perf
> > subsystem: https://lore.kernel.org/linux-pci/20231121013400.18367-1-
> > xueshuai=40linux.alibaba.com/
> >
> > - Mani
> >
>=20
> Hi Mani,
>=20
> The series proposed in perf includes only time based-analysis and event c=
ounters
> which will monitor performance (Group 6 and 7). The patch or framework th=
at we
> have proposed includes debug information, error injection facility and er=
ror
> counters (Group 0 - 5) which are not included as part of the functionalit=
y
> implemented via perf. In my opinion, these functionalities don't count as
> performance monitoring or counters but rather as debug counters. How abou=
t
> we take this up as a debugfs framework as proposed in my patch?
> Or if others feel it can be taken via perf driver then I am happy to exte=
nd the perf
> driver if authors do not have objection. Let me know what you think of th=
is?
> Meanwhile I will review the perf patches and share my feedback.
>=20

Hello Mani,
Any update on the above comment? IMO, even though the perf patches and this
patchset are both part of the DWC vendor specific capability - RASDES,  the=
y
cover different features. The perf file includes performance based paramete=
rs
like time-based analysis and event counters for count of packets whereas th=
is
patchset includes debugging fields, error injection and event counters for =
count
of errors. I think having a separate debugfs file fits more but would you s=
uggest
we extend the perf file itself?=20

Shradha

> > > Shradha Todi (3):
> > >   PCI: dwc: Add support for vendor specific capability search
> > >   PCI: debugfs: Add support for RASDES framework in DWC
> > >   PCI: dwc: Create debugfs files in DWC driver
> > >
> > >  drivers/pci/controller/dwc/Kconfig            =7C   8 +
> > >  drivers/pci/controller/dwc/Makefile           =7C   1 +
> > >  .../controller/dwc/pcie-designware-debugfs.c  =7C 476
> > ++++++++++++++++++
> > >  .../controller/dwc/pcie-designware-debugfs.h  =7C   0
> > >  drivers/pci/controller/dwc/pcie-designware.c  =7C  20 +
> > > drivers/pci/controller/dwc/pcie-designware.h  =7C  18 +
> > >  6 files changed, 523 insertions(+)
> > >  create mode 100644
> > > drivers/pci/controller/dwc/pcie-designware-debugfs.c
> > >  create mode 100644
> > > drivers/pci/controller/dwc/pcie-designware-debugfs.h
> > >
> > > --
> > > 2.17.1
> > >
> >
> > --
> > =E0=AE=AE=E0=AE=A3=E0=AE=BF=E0=AE=B5=E0=AE=A3=E0=AF=8D=E0=AE=A3=E0=AE=
=A9=E0=AF=8D=20=E0=AE=9A=E0=AE=A4=E0=AE=BE=E0=AE=9A=E0=AE=BF=E0=AE=B5=E0=AE=
=AE=E0=AF=8D=0D=0A=0D=0A