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Date: Thu, 4 Jan 2024 11:07:27 +0100
From: Marco Felsch <m.felsch@pengutronix.de>
To: Frank Li <Frank.li@nxp.com>
Cc: krzysztof.kozlowski@linaro.org, devicetree@vger.kernel.org,
	conor+dt@kernel.org, hongxing.zhu@nxp.com,
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	l.stach@pengutronix.de
Subject: Re: [PATCH v7 01/16] PCI: imx6: Simplify clock handling by using
 bulk_clk_*() function
Message-ID: <20240104100727.xtwn76lhp72ika7i@pengutronix.de>
References: <20231227182727.1747435-1-Frank.Li@nxp.com>
 <20231227182727.1747435-2-Frank.Li@nxp.com>
 <20240102084744.tyquwp6hkb36tfxg@pengutronix.de>
 <ZZWTIbjBJ/DdpUQi@lizhi-Precision-Tower-5810>
Precedence: bulk
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User-Agent: NeoMutt/20180716

On 24-01-03, Frank Li wrote:
> On Tue, Jan 02, 2024 at 09:47:44AM +0100, Marco Felsch wrote:
> > Hi Frank,
> > 
> > On 23-12-27, Frank Li wrote:
> > > Refactors the clock handling logic. Adds clk_names[] define in drvdata.
> > > Using clk_bulk*() api simplifies the code.
> > 
> > does this influence the clock enable/disable sequence ordering? Just
> > asking to avoid regressions on older platforms which may require some
> > sort of order (e.g. require clock-a before clock-b).
> 
> drvdata::clk_names is order of enble sequence. So far we have not found
> the problem.

Okay, thanks.

Regards,
  Marco