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Thu, 4 Jan 2024 10:27:14 GMT Received: from [10.239.154.73] (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 4 Jan 2024 02:27:08 -0800 Message-ID: Date: Thu, 4 Jan 2024 18:27:06 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: ipq6018: add #power-domain-cells for gcc node Content-Language: en-US To: Konrad Dybcio , Dmitry Baryshkov , , CC: , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , References: <20240104-gcc-docs-update-v1-1-127e4816b798@quicinc.com> <724f608a-cbfe-48f6-a1f7-59b961a7d724@quicinc.com> <56ee556d-ec31-4553-bce3-0c1e12c111ed@linaro.org> From: Fenglin Wu In-Reply-To: <56ee556d-ec31-4553-bce3-0c1e12c111ed@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: EDpcKrpjHAX5L9AZipH9LHlQ9VE4gyLL X-Proofpoint-ORIG-GUID: EDpcKrpjHAX5L9AZipH9LHlQ9VE4gyLL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_01,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 spamscore=0 suspectscore=0 impostorscore=0 bulkscore=0 malwarescore=0 mlxlogscore=999 phishscore=0 mlxscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401040079 On 1/4/2024 6:16 PM, Konrad Dybcio wrote: > On 4.01.2024 11:13, Fenglin Wu wrote: >> >> >> On 1/4/2024 5:53 PM, Dmitry Baryshkov wrote: >>> On Thu, 4 Jan 2024 at 10:06, Fenglin Wu via B4 Relay >>> wrote: >>>> >>>> From: Fenglin Wu >>>> >>>> Property '#power-domain-cells' is required as per defined in qcom,gcc.yaml >>>> so add it for ipq6018 gcc device node to eliminate following warning in >>>> dtbs_check: >>>> >>>> arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: gcc@1800000: >>>>          '#power-domain-cells' is a required property >>>> from schema $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq6018.yaml# >>> >>> But ipq6018 doesn't implement GDSC support. So for the sake of fixing >>> the warning you are adding a bogus property. >>> >> I agree. However, there are also some gcc drivers not implementing GDSC support but the bindings are adding '#power-domain-cells' in the DT example, such as: qcom,gcc-apq8064.yaml, qcom,gcc-ipq4019.yaml, qcom,gcc-ipq6018.yaml, qcom,gcc-ipq8064.yaml, qcom,gcc-msm8660.yaml. >> >> Actually I thought that maybe we should do a clean up by removing '#power-domain-cells' out of the qcom,gcc.yaml binding and only adding it into individual qcom,gcc-xxx.yaml for the driver which has implemented GDSC support. I checked this with Taniya offline, but she prefers only fixing it in ipq6018.dtsi as it doesn't hurt anything by adding the property, and she expects the GDSC support should be existing in most of qcom,gcc drivers especially the newer Qcom chipsets. > > Before we start changing anything, we should assess whether these > platforms actually have GDSCs within this clock controller block, > even if they are (currently) not described in the clk driver. > I would assume '#power-domain-cells' is only required for drivers which register GDSC as power-domain device, for drivers that only configure GDSC during probe or for platforms have GDSC but not register them as power-domain device, making '#power-domain-cells' as a required property doesn't help anything but just generating more dtbs check warnings. > Konrad