Received-SPF: pass (google.com: domain of linux-kernel+bounces-16511-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1;
Precedence: bulk
MIME-Version: 1.0
References: <20240104-gcc-docs-update-v1-1-127e4816b798@quicinc.com>
 <CAA8EJprsGke9zZBy_x=YSxz7R1aSpx8r3ndjjXVVKhjKBxd=QQ@mail.gmail.com>
 <724f608a-cbfe-48f6-a1f7-59b961a7d724@quicinc.com> <56ee556d-ec31-4553-bce3-0c1e12c111ed@linaro.org>
In-Reply-To: <56ee556d-ec31-4553-bce3-0c1e12c111ed@linaro.org>
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Date: Thu, 4 Jan 2024 12:34:57 +0200
Message-ID: <CAA8EJpqg_BMXbcQEiH-YtgMtioYp0D9W-vGBvKpoGjfrQydYtw@mail.gmail.com>
Subject: Re: [PATCH] arm64: dts: qcom: ipq6018: add #power-domain-cells for
 gcc node
To: Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: Fenglin Wu <quic_fenglinw@quicinc.com>, quic_tdas@quicinc.com, 
	quic_aiquny@quicinc.com, kernel@quicinc.com, Andy Gross <agross@kernel.org>, 
	Bjorn Andersson <andersson@kernel.org>, Rob Herring <robh+dt@kernel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, 
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, 
	linux-kernel@vger.kernel.org
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable

On Thu, 4 Jan 2024 at 12:16, Konrad Dybcio <konrad.dybcio@linaro.org> wrote=
:
>
> On 4.01.2024 11:13, Fenglin Wu wrote:
> >
> >
> > On 1/4/2024 5:53 PM, Dmitry Baryshkov wrote:
> >> On Thu, 4 Jan 2024 at 10:06, Fenglin Wu via B4 Relay
> >> <devnull+quic_fenglinw.quicinc.com@kernel.org> wrote:
> >>>
> >>> From: Fenglin Wu <quic_fenglinw@quicinc.com>
> >>>
> >>> Property '#power-domain-cells' is required as per defined in qcom,gcc=
.yaml
> >>> so add it for ipq6018 gcc device node to eliminate following warning =
in
> >>> dtbs_check:
> >>>
> >>> arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: gcc@1800000:
> >>>          '#power-domain-cells' is a required property
> >>> from schema $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq6018=
.yaml#
> >>
> >> But ipq6018 doesn't implement GDSC support. So for the sake of fixing
> >> the warning you are adding a bogus property.
> >>
> > I agree. However, there are also some gcc drivers not implementing GDSC=
 support but the bindings are adding '#power-domain-cells' in the DT exampl=
e, such as: qcom,gcc-apq8064.yaml, qcom,gcc-ipq4019.yaml, qcom,gcc-ipq6018.=
yaml, qcom,gcc-ipq8064.yaml, qcom,gcc-msm8660.yaml.
> >
> > Actually I thought that maybe we should do a clean up by removing '#pow=
er-domain-cells' out of the qcom,gcc.yaml binding and only adding it into i=
ndividual qcom,gcc-xxx.yaml for the driver which has implemented GDSC suppo=
rt. I checked this with Taniya offline, but she prefers only fixing it in i=
pq6018.dtsi as it doesn't hurt anything by adding the property, and she exp=
ects the GDSC support should be existing in most of qcom,gcc drivers especi=
ally the newer Qcom chipsets.
>
> Before we start changing anything, we should assess whether these
> platforms actually have GDSCs within this clock controller block,
> even if they are (currently) not described in the clk driver.

APQ8064 / MSM8960 / MSM8x60  (and thus I assume IPQ8064) have an older
power rail control mechanism called footswitch / GFS_CTL. We do not
implement it (for now), but it might be worth implementing it as the
question has been raised.

--=20
With best wishes
Dmitry