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bh=Ik4uyCYv2TQarb31EWuXmmWrYINJlUytsNJyudVrGMk=; b=dacrtNmfwcPbWgMgmMTT31gpM3j/Gh1Pdcq1G0LyPQBqr12GWkuMitzL0pTWmtDvZX 9Q8WqBcOjChPcrPBphm4FP4eL30fFermNM3dwG0VjCJJpr9jZ/BWZT8TTkKjHH8pD0w+ sy0hKmMEmQW8k04Gew/ywJsRopynzkOPhyfHuA7i/pG2uc7VpkPb9++/hJbV9X8GYUnd Npt+BR22AjPyjJn6o0lrvrOy8jkXn1IZvtidHKcNIPdKFZp8/Ocav9IZNeScS+F9sRM9 ziFgrBfTkt6HiFizEGzH4A2h+3TCTM+RntWHrdNZNRW+UHljR3yFoLkIeP0L5gOJJZNx +QDw== X-Gm-Message-State: AOJu0YylTsrWmjL3wVCsDehqLDppDjcP3IYlD3naNBcehll2AlCE6Nq3 mr8KhGDO+shDaTOIkxhVZUMMJ7BPcxbvKfPR0Vi9JyberF52b83GeFpT+5khAok= X-Received: by 2002:a17:906:56d3:b0:a23:5893:1ac8 with SMTP id an19-20020a17090656d300b00a2358931ac8mr587088ejc.27.1704371648530; Thu, 04 Jan 2024 04:34:08 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240102220134.3229156-1-samuel.holland@sifive.com> <20240102220134.3229156-5-samuel.holland@sifive.com> In-Reply-To: <20240102220134.3229156-5-samuel.holland@sifive.com> From: Alexandre Ghiti Date: Thu, 4 Jan 2024 13:33:57 +0100 Message-ID: Subject: Re: [PATCH v4 04/12] riscv: Only send remote fences when some other CPU is online To: Samuel Holland Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Jan 2, 2024 at 11:01=E2=80=AFPM Samuel Holland wrote: > > If no other CPU is online, a local cache or TLB flush is sufficient. > These checks can be constant-folded when SMP is disabled. > > Signed-off-by: Samuel Holland > --- > > Changes in v4: > - New patch for v4 > > arch/riscv/mm/cacheflush.c | 4 +++- > arch/riscv/mm/tlbflush.c | 4 +++- > 2 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c > index 47c485bc7df0..f7933ae88a55 100644 > --- a/arch/riscv/mm/cacheflush.c > +++ b/arch/riscv/mm/cacheflush.c > @@ -21,7 +21,9 @@ void flush_icache_all(void) > { > local_flush_icache_all(); > > - if (riscv_use_sbi_for_rfence()) > + if (num_online_cpus() < 2) > + return; > + else if (riscv_use_sbi_for_rfence()) > sbi_remote_fence_i(NULL); > else > on_each_cpu(ipi_remote_fence_i, NULL, 1); > diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c > index 2f18fe6fc4f3..37b3c93e3c30 100644 > --- a/arch/riscv/mm/tlbflush.c > +++ b/arch/riscv/mm/tlbflush.c > @@ -73,7 +73,9 @@ static void __ipi_flush_tlb_all(void *info) > > void flush_tlb_all(void) > { > - if (riscv_use_sbi_for_rfence()) > + if (num_online_cpus() < 2) > + local_flush_tlb_all(); > + else if (riscv_use_sbi_for_rfence()) > sbi_remote_sfence_vma_asid(NULL, 0, FLUSH_TLB_MAX_SIZE, F= LUSH_TLB_NO_ASID); > else > on_each_cpu(__ipi_flush_tlb_all, NULL, 1); > -- > 2.42.0 > on_each_cpu() already deals correctly with a single online cpu, the only thing to optimize here is the SBI rfence. So I'd move this new test in sbi_remote_sfence_vma_asid() and sbi_remote_fence_i() to avoid the superfluous M-mode entry when only one cpu is online by checking the cpumask. And since sbi_remote_fence_i() is used in another function (flush_icache_mm()), we could also take advantage of this optimization when only the local cpu must be flushed.