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bh=cjQDiWQhmYwu06q+jnykGxK4oKv3uADualUi+Y7oThw=; b=PXg0lNvgQhkN27l3d+nC9MnRBdtsuzs09oQ8mF1OMkkySPzim76eTkyoaTHtXkaoIM OYj1LNszpXKyGL7UYYXai8aP5ve/L44NFBhjZ8W45pRWnqRIcB6M2tvFoYJrO+/z7lc3 uVWmlY+Jy35yVxpXZryPI/yBBj2YkB6Bj1VFdNE22AIs9f03FmW3mPnTHfhdOshzdF7E IIRNjkUPN9K7rBDLwC7+cWSVXn/nlcNA9TYNLr2I4hYtIE0aFFPbTm+6934/1EU6UDyH /K01Oafp1jDzfuQAdE2+4PsSkdS/EnxnciJer5NHPkGbTwgLH9lhWlzp1Fz/5W8Or9zG JGFA== X-Gm-Message-State: AOJu0YywxRiOe9WdvcLCmkGk98WqfOLJecV/t9I9ghnwbNBpyoYGGPEh LCbaeg9nWvhFTafwMUFreSQmQp2t+Q+YgNX2GOIQW0Ow44rmHA== X-Received: by 2002:a05:6512:3b07:b0:50e:378b:5187 with SMTP id f7-20020a0565123b0700b0050e378b5187mr480099lfv.41.1704372950594; Thu, 04 Jan 2024 04:55:50 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240102220134.3229156-1-samuel.holland@sifive.com> <20240102220134.3229156-12-samuel.holland@sifive.com> In-Reply-To: <20240102220134.3229156-12-samuel.holland@sifive.com> From: Alexandre Ghiti Date: Thu, 4 Jan 2024 13:55:40 +0100 Message-ID: Subject: Re: [PATCH v4 11/12] riscv: mm: Preserve global TLB entries when switching contexts To: Samuel Holland Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, Jan 2, 2024 at 11:01=E2=80=AFPM Samuel Holland wrote: > > If the CPU does not support multiple ASIDs, all MM contexts use ASID 0. > In this case, it is still beneficial to flush the TLB by ASID, as the > single-ASID variant of the sfence.vma instruction preserves TLB entries > for global (kernel) pages. > > This optimization is recommended by the RISC-V privileged specification: > > If the implementation does not provide ASIDs, or software chooses > to always use ASID 0, then after every satp write, software should > execute SFENCE.VMA with rs1=3Dx0. In the common case that no global > translations have been modified, rs2 should be set to a register > other than x0 but which contains the value zero, so that global > translations are not flushed. > > It is not possible to apply this optimization when using the ASID > allocator, because that code must flush the TLB for all ASIDs at once > when incrementing the version number. > > Signed-off-by: Samuel Holland > --- > > (no changes since v1) > > arch/riscv/mm/context.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c > index 43a8bc2d5af4..3ca9b653df7d 100644 > --- a/arch/riscv/mm/context.c > +++ b/arch/riscv/mm/context.c > @@ -200,7 +200,7 @@ static void set_mm_noasid(struct mm_struct *mm) > { > /* Switch the page table and blindly nuke entire local TLB */ > csr_write(CSR_SATP, virt_to_pfn(mm->pgd) | satp_mode); > - local_flush_tlb_all(); > + local_flush_tlb_all_asid(0); > } > > static inline void set_mm(struct mm_struct *prev, > -- > 2.42.0 > You can add: Reviewed-by: Alexandre Ghiti Thanks, Alex