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Thu, 04 Jan 2024 05:26:59 -0800 (PST) Received: from smtpclient.apple ([132.69.236.92]) by smtp.gmail.com with ESMTPSA id ef7-20020a05640228c700b00556cf2545desm2249504edb.16.2024.01.04.05.26.55 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 04 Jan 2024 05:26:58 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3774.300.61.1.2\)) Subject: Re: [PATCH 1/2] mm/tlb: fix fullmm semantics From: Nadav Amit In-Reply-To: Date: Thu, 4 Jan 2024 15:26:43 +0200 Cc: Will Deacon , Aneesh Kumar K V , Andrew Morton , Nick Piggin , Peter Zijlstra , Catalin Marinas , Paul Walmsley , Palmer Dabbelt , Albert Ou , Arnd Bergmann , linux-arch@vger.kernel.org, linux-mm , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-riscv@lists.infradead.org, Nadav Amit , Andrea Arcangeli , Andy Lutomirski , Dave Hansen , Thomas Gleixner , Yu Zhao , the arch/x86 maintainers Message-Id: <0468E994-273E-4A8B-A521-150723DA9774@broadcom.com> References: <20231228084642.1765-1-jszhang@kernel.org> <20231228084642.1765-2-jszhang@kernel.org> <204B6410-2EFA-462B-9DF7-64CC5F1D3AD2@broadcom.com> To: Jisheng Zhang X-Mailer: Apple Mail (2.3774.300.61.1.2) Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable > On Jan 2, 2024, at 4:41=E2=80=AFAM, Jisheng Zhang wr= ote: >=20 > On Sat, Dec 30, 2023 at 11:54:02AM +0200, Nadav Amit wrote: >=20 >>=20 >> My knowledge of arm64 is a bit limited, but the code does not seem >> to match the comment, so if it is correct (which I strongly doubt), >> the comment should be updated. >=20 > will do if the above change is accepted by arm64 Jisheng, I expected somebody with arm64 knowledge to point it out, and maybe I am wrong, but I really don=E2=80=99t understand something about the correctness, if you can please explain. In the following code: --- a/arch/arm64/include/asm/tlb.h +++ b/arch/arm64/include/asm/tlb.h @@ -62,7 +62,10 @@ static inline void tlb_flush(struct mmu_gather *tlb) * invalidating the walk-cache, since the ASID allocator won't * reallocate our ASID without invalidating the entire TLB. */ - if (tlb->fullmm) { + if (tlb->fullmm) + return; You skip flush if fullmm is on. But if page-tables are freed, you may want to flush immediately and not wait for ASID to be freed to avoid speculative page walks; these walks at least on x86 caused a mess. No? --=20 This electronic communication and the information and any files transmitted= =20 with it, or attached to it, are confidential and are intended solely for=20 the use of the individual or entity to whom it is addressed and may contain= =20 information that is confidential, legally privileged, protected by privacy= =20 laws, or otherwise restricted from disclosure to anyone else. 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