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Thu, 4 Jan 2024 14:23:39 GMT Received: from hu-skakitap-hyd.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 4 Jan 2024 06:23:34 -0800 From: Satya Priya Kakitapalli Date: Thu, 4 Jan 2024 19:53:06 +0530 Subject: [PATCH 3/3] clk: qcom: gcc-sm8150: Update the gcc resets Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20240104-sm8150-dfs-support-v1-3-a5eebfdc1b12@quicinc.com> References: <20240104-sm8150-dfs-support-v1-0-a5eebfdc1b12@quicinc.com> In-Reply-To: <20240104-sm8150-dfs-support-v1-0-a5eebfdc1b12@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Deepak Katragadda , Vinod Koul , Taniya Das , "Rob Herring" , Krzysztof Kozlowski , Conor Dooley CC: , , , , Ajit Pandey , Imran Shaik , "Jagadeesh Kona" , Satya Priya Kakitapalli X-Mailer: b4 0.12.4 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: UdK7BLfOJYq5U9ywj3RJpE5aIpf8MN_p X-Proofpoint-ORIG-GUID: UdK7BLfOJYq5U9ywj3RJpE5aIpf8MN_p X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_01,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 mlxscore=0 impostorscore=0 phishscore=0 clxscore=1015 malwarescore=0 adultscore=0 mlxlogscore=778 suspectscore=0 bulkscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401040113 Add all the available resets for the global clock controller on sm8150. Fixes: 2a1d7eb854bb ("clk: qcom: gcc: Add global clock controller driver for SM8150") Signed-off-by: Satya Priya Kakitapalli --- drivers/clk/qcom/gcc-sm8150.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c index 6d76fd344ddf..833e64b61e6b 100644 --- a/drivers/clk/qcom/gcc-sm8150.c +++ b/drivers/clk/qcom/gcc-sm8150.c @@ -3778,6 +3778,9 @@ static const struct qcom_reset_map gcc_sm8150_resets[] = { [GCC_USB30_PRIM_BCR] = { 0xf000 }, [GCC_USB30_SEC_BCR] = { 0x10000 }, [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 }, + [GCC_VIDEO_AXIC_CLK_BCR] = { 0xb02c, 2 }, + [GCC_VIDEO_AXI0_CLK_BCR] = { 0xb024, 2 }, + [GCC_VIDEO_AXI1_CLK_BCR] = { 0xb028, 2 }, }; static struct gdsc *gcc_sm8150_gdscs[] = { -- 2.25.1