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Date: Fri, 5 Jan 2024 16:17:09 +1100
From: Stephen Rothwell <sfr@canb.auug.org.au>
To: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Jiang <dave.jiang@intel.com>, Linux Kernel Mailing List
 <linux-kernel@vger.kernel.org>, Linux Next Mailing List
 <linux-next@vger.kernel.org>
Subject: linux-next: build failure after merge of the cxl tree
Message-ID: <20240105161709.22d1b027@canb.auug.org.au>
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Hi all,

After merging the cxl tree, today's linux-next build (x86_64 allmodconfig)
failed like this:

drivers/cxl/core/cdat.c: In function 'match_cxlrd_hb':
drivers/cxl/core/cdat.c:327:43: error: 'struct cxl_switch_decoder' has no m=
ember named 'target_lock'
  327 |                 seq =3D read_seqbegin(&cxlsd->target_lock);
      |                                           ^~
drivers/cxl/core/cdat.c:332:38: error: 'struct cxl_switch_decoder' has no m=
ember named 'target_lock'
  332 |         } while (read_seqretry(&cxlsd->target_lock, seq));
      |                                      ^~

Caused by commit

  185c1a489f87 ("cxl: Check qos_class validity on memdev probe")

interacting with commit

  5459e186a5c9 ("cxl/port: Fix missing target list lock")

from hte cls-fixes tree.

I have applied the following merge resolution for today.

From: Stephen Rothwell <sfr@canb.auug.org.au>
Date: Fri, 5 Jan 2024 15:44:24 +1100
Subject: [PATCH] fix up for "cxl: Check qos_class validity on memdev probe"

interacting with "cxl/port: Fix missing target list lock"

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
 drivers/cxl/core/cdat.c | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c
index cd84d87f597a..10ac76bed477 100644
--- a/drivers/cxl/core/cdat.c
+++ b/drivers/cxl/core/cdat.c
@@ -8,6 +8,7 @@
 #include "cxlpci.h"
 #include "cxlmem.h"
 #include "cxl.h"
+#include "core.h"
=20
 struct dsmas_entry {
 	struct range dpa_range;
@@ -315,7 +316,6 @@ static int match_cxlrd_hb(struct device *dev, void *dat=
a)
 	struct device *host_bridge =3D data;
 	struct cxl_switch_decoder *cxlsd;
 	struct cxl_root_decoder *cxlrd;
-	unsigned int seq;
=20
 	if (!is_root_decoder(dev))
 		return 0;
@@ -323,13 +323,11 @@ static int match_cxlrd_hb(struct device *dev, void *d=
ata)
 	cxlrd =3D to_cxl_root_decoder(dev);
 	cxlsd =3D &cxlrd->cxlsd;
=20
-	do {
-		seq =3D read_seqbegin(&cxlsd->target_lock);
-		for (int i =3D 0; i < cxlsd->nr_targets; i++) {
-			if (host_bridge =3D=3D cxlsd->target[i]->dport_dev)
-				return 1;
-		}
-	} while (read_seqretry(&cxlsd->target_lock, seq));
+	guard(rwsem_read)(&cxl_region_rwsem);
+	for (int i =3D 0; i < cxlsd->nr_targets; i++) {
+		if (host_bridge =3D=3D cxlsd->target[i]->dport_dev)
+			return 1;
+	}
=20
 	return 0;
 }
--=20
2.43.0

--=20
Cheers,
Stephen Rothwell

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