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Miller" , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , "open list:STMMAC ETHERNET DRIVER" , "moderated list:ARM/STM32 ARCHITECTURE" , "moderated list:ARM/STM32 ARCHITECTURE" , open list , "open list:ARM/Allwinner sunXi SoC support" Subject: Re: [PATCH] net: stmmac: protect statistics updates with a spinlock Message-ID: <20240105113402.0f5f1232@meshulam.tesarici.cz> In-Reply-To: References: <20240105091556.15516-1-petr@tesarici.cz> X-Mailer: Claws Mail 4.2.0 (GTK 3.24.39; x86_64-suse-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Fri, 5 Jan 2024 10:58:42 +0100 Eric Dumazet wrote: > On Fri, Jan 5, 2024 at 10:16=E2=80=AFAM Petr Tesarik w= rote: > > > > Add a spinlock to fix race conditions while updating Tx/Rx statistics. > > > > As explained by a comment in , write side of st= ruct > > u64_stats_sync must ensure mutual exclusion, or one seqcount update cou= ld > > be lost on 32-bit platforms, thus blocking readers forever. > > > > Such lockups have been actually observed on 32-bit Arm after stmmac_xmi= t() > > on one core raced with stmmac_napi_poll_tx() on another core. > > > > Signed-off-by: Petr Tesarik =20 >=20 > This is going to add more costs to 64bit platforms ? Yes, it adds a (hopefully not too contended) spinlock and in most places an interrupt disable/enable pair. FWIW the race condition is also present on 64-bit platforms, resulting in inaccurate statistic counters. I can understand if you consider it a mild annoyance, not worth fixing. > It seems to me that the same syncp can be used from two different > threads : hard irq and napi poller... Yes, that's exactly the scenario that locks up my system. > At this point, I do not see why you keep linux/u64_stats_sync.h if you > decide to go for a spinlock... The spinlock does not havce to be taken on the reader side, so the seqcounter still adds some value. > Alternative would use atomic64_t fields for the ones where there is no > mutual exclusion. >=20 > RX : napi poll is definitely safe (protected by an atomic bit) > TX : each TX queue is also safe (protected by an atomic exclusion for > non LLTX drivers) >=20 > This leaves the fields updated from hardware interrupt context ? I'm afraid I don't have enough network-stack-foo to follow here. My issue on 32 bit is that stmmac_xmit() may be called directly from process context while another core runs the TX napi on the same channel (in interrupt context). I didn't observe any race on the RX path, but I believe it's possible with NAPI busy polling. In any case, I don't see the connection with LLTX. Maybe you want to say that the TX queue is safe for stmmac (because it is a non-LLTX driver), but might not be safe for LLTX drivers? Petr T