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control module To: Krzysztof Kozlowski , Chen Wang , aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, palmer@dabbelt.com, paul.walmsley@sifive.com, richardcochran@gmail.com, robh+dt@kernel.org, sboyd@kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com, guoren@kernel.org, jszhang@kernel.org, inochiama@outlook.com, samuel.holland@sifive.com References: From: Chen Wang In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TMN: [pvh8ncbL6CckRfDfZ6tJGYQQknwrYUtV] X-ClientProxiedBy: SI2PR02CA0014.apcprd02.prod.outlook.com (2603:1096:4:194::19) To MA0P287MB2822.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:138::5) X-Microsoft-Original-Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: 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=?utf-8?B?UlZTakFBQ0o3NW5ZZlRkbi8wUzNobnBXRStwSWdlc3VFLzVCRDZibTdmNnp0?= =?utf-8?B?eDk0ZjUxZzRQUDl3b2FPc1dvb2g1ZmR0dS9xVTFmOHhiZEc0SzFCNHE2N2FL?= =?utf-8?Q?Ne26g8ZlK+9XHK+Y62rj+EKjTJKit4J9cpWqFq7J71bw=3D?= X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: e717d7ad-9743-4701-077f-08dc101a583e X-MS-Exchange-CrossTenant-AuthSource: MA0P287MB2822.INDP287.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jan 2024 07:20:51.8888 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: PN0P287MB2595 On 2024/1/8 15:03, Krzysztof Kozlowski wrote: > On 08/01/2024 07:48, Chen Wang wrote: >> From: Chen Wang >> >> Add documentation to describe Sophgo System Controller for SG2042. >> >> Signed-off-by: Chen Wang >> Reviewed-by: Krzysztof Kozlowski >> --- >> .../soc/sophgo/sophgo,sg2042-sysctrl.yaml | 34 +++++++++++++++++++ >> 1 file changed, 34 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml >> >> diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml >> new file mode 100644 >> index 000000000000..1ec1eaa55598 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml >> @@ -0,0 +1,34 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,sg2042-sysctrl.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Sophgo SG2042 SoC system controller >> + >> +maintainers: >> + - Chen Wang >> + >> +description: >> + The Sophgo SG2042 SoC system controller provides register information such >> + as offset, mask and shift that can be used by other modules, such as clocks. > "offset, mask and shift" is not a register information stored in > syscons. Are you really sure, that your system controller hardware > stores offsets of some other registers? > > Show as some example of such offsets, masks and shifts provided by this > hardware. The system control module is defined here: https://github.com/sophgo/sophgo-doc/blob/main/SG2042/TRM/source/system-control.rst. It contains some registers related to pll and gates. Some other clocks registars are defined in https://github.com/sophgo/sophgo-doc/blob/main/SG2042/TRM/source/clock.rst. memory-map is defined in https://github.com/sophgo/sophgo-doc/blob/main/SG2042/TRM/source/mmap.rst > > > Best regards, > Krzysztof >