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Message-ID: <485d0685-646c-44b8-823a-49870e109103@amd.com>
Date: Mon, 8 Jan 2024 09:12:21 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 2/2] dt-bindings: fpga: altera: Convert bridge bindings to
 yaml
Content-Language: en-US
To: Xu Yilun <yilun.xu@linux.intel.com>
Cc: linux-kernel@vger.kernel.org, monstr@monstr.eu, michal.simek@xilinx.com,
 git@xilinx.com, Conor Dooley <conor+dt@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
 Moritz Fischer <mdf@kernel.org>, Rob Herring <robh+dt@kernel.org>,
 Tom Rix <trix@redhat.com>, Wu Hao <hao.wu@intel.com>,
 Xu Yilun <yilun.xu@intel.com>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@vger.kernel.org>,
 "open list:FPGA MANAGER FRAMEWORK" <linux-fpga@vger.kernel.org>
References: <3100bbc4723643ec1ec7d4548e9ab353c856b564.1704470663.git.michal.simek@amd.com>
 <e738a64f742982bba6c7a8ea3cbc660f81316d2b.1704470663.git.michal.simek@amd.com>
 <ZZuoTG2wdXQvLlAa@yilunxu-OptiPlex-7050>
From: Michal Simek <michal.simek@amd.com>
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On 1/8/24 08:46, Xu Yilun wrote:
> On Fri, Jan 05, 2024 at 05:04:31PM +0100, Michal Simek wrote:
>> Convert Altera's bridges to yaml with using fpga-bridge.yaml.
>>
>> Signed-off-by: Michal Simek <michal.simek@amd.com>
>> ---
>>
>>   .../fpga/altera-fpga2sdram-bridge.txt         | 13 ----
>>   .../fpga/altera-fpga2sdram-bridge.yaml        | 34 ++++++++++
>>   .../bindings/fpga/altera-freeze-bridge.txt    | 20 ------
>>   .../bindings/fpga/altera-freeze-bridge.yaml   | 41 ++++++++++++
>>   .../bindings/fpga/altera-hps2fpga-bridge.txt  | 36 -----------
>>   .../bindings/fpga/altera-hps2fpga-bridge.yaml | 63 +++++++++++++++++++
>>   6 files changed, 138 insertions(+), 69 deletions(-)
>>   delete mode 100644 Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt
>>   create mode 100644 Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.yaml
>>   delete mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
>>   create mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.yaml
>>   delete mode 100644 Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
>>   create mode 100644 Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt
>> deleted file mode 100644
>> index 5dd0ff0f7b4e..000000000000
>> --- a/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt
>> +++ /dev/null
>> @@ -1,13 +0,0 @@
>> -Altera FPGA To SDRAM Bridge Driver
>> -
>> -Required properties:
>> -- compatible		: Should contain "altr,socfpga-fpga2sdram-bridge"
>> -
>> -See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
>> -
>> -Example:
>> -	fpga_bridge3: fpga-bridge@ffc25080 {
>> -		compatible = "altr,socfpga-fpga2sdram-bridge";
>> -		reg = <0xffc25080 0x4>;
>> -		bridge-enable = <0>;
>> -	};
>> diff --git a/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.yaml b/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.yaml
>> new file mode 100644
>> index 000000000000..a3f3fe2729f2
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.yaml
>> @@ -0,0 +1,34 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/fpga/altera-fpga2sdram-bridge.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Altera FPGA To SDRAM Bridge
>> +
>> +maintainers:
>> +  - Xu Yilun <yilun.xu@intel.com>
>> +
>> +allOf:
>> +  - $ref: fpga-bridge.yaml#
>> +
>> +properties:
>> +  compatible:
>> +    const: altr,socfpga-fpga2sdram-bridge
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +required:
>> +  - compatible
>> +  - reg
> 
> Is the 'reg' required? I didn't see it in original txt.

you tell me. It was in example that's why I made it mandatory.

> 
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> +  - |
>> +    fpga-bridge@ffc25080 {
>> +        compatible = "altr,socfpga-fpga2sdram-bridge";
>> +        reg = <0xffc25080 0x4>;
>> +        bridge-enable = <0>;
>> +    };
>> diff --git a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
>> deleted file mode 100644
>> index 8b26fbcff3c6..000000000000
>> --- a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
>> +++ /dev/null
>> @@ -1,20 +0,0 @@
>> -Altera Freeze Bridge Controller Driver
>> -
>> -The Altera Freeze Bridge Controller manages one or more freeze bridges.
>> -The controller can freeze/disable the bridges which prevents signal
>> -changes from passing through the bridge.  The controller can also
>> -unfreeze/enable the bridges which allows traffic to pass through the
>> -bridge normally.
>> -
>> -Required properties:
>> -- compatible		: Should contain "altr,freeze-bridge-controller"
>> -- regs			: base address and size for freeze bridge module
>> -
>> -See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
>> -
>> -Example:
>> -	freeze-controller@100000450 {
>> -		compatible = "altr,freeze-bridge-controller";
>> -		regs = <0x1000 0x10>;
>> -		bridge-enable = <0>;
>> -	};
>> diff --git a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.yaml b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.yaml
>> new file mode 100644
>> index 000000000000..4a89e3980669
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.yaml
>> @@ -0,0 +1,41 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/fpga/altera-freeze-bridge.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Altera Freeze Bridge Controller
>> +
>> +description: |
>> +  The Altera Freeze Bridge Controller manages one or more freeze bridges.
>> +  The controller can freeze/disable the bridges which prevents signal
>> +  changes from passing through the bridge. The controller can also
>> +  unfreeze/enable the bridges which allows traffic to pass through the bridge
>> +  normally.
>> +
>> +maintainers:
>> +  - Xu Yilun <yilun.xu@intel.com>
>> +
>> +allOf:
>> +  - $ref: fpga-bridge.yaml#
>> +
>> +properties:
>> +  compatible:
>> +    const: altr,freeze-bridge-controller
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> +  - |
>> +    fpga-bridge@100000450 {
>> +        compatible = "altr,freeze-bridge-controller";
>> +        reg = <0x1000 0x10>;
>> +        bridge-enable = <0>;
>> +    };
>> diff --git a/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
>> deleted file mode 100644
>> index 68cce3945b10..000000000000
>> --- a/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
>> +++ /dev/null
>> @@ -1,36 +0,0 @@
>> -Altera FPGA/HPS Bridge Driver
>> -
>> -Required properties:
>> -- regs		: base address and size for AXI bridge module
>> -- compatible	: Should contain one of:
>> -		  "altr,socfpga-lwhps2fpga-bridge",
>> -		  "altr,socfpga-hps2fpga-bridge", or
>> -		  "altr,socfpga-fpga2hps-bridge"
>> -- resets	: Phandle and reset specifier for this bridge's reset
>> -- clocks	: Clocks used by this module.
>> -
>> -See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
>> -
>> -Example:
>> -	fpga_bridge0: fpga-bridge@ff400000 {
>> -		compatible = "altr,socfpga-lwhps2fpga-bridge";
>> -		reg = <0xff400000 0x100000>;
>> -		resets = <&rst LWHPS2FPGA_RESET>;
>> -		clocks = <&l4_main_clk>;
>> -		bridge-enable = <0>;
>> -	};
>> -
>> -	fpga_bridge1: fpga-bridge@ff500000 {
>> -		compatible = "altr,socfpga-hps2fpga-bridge";
>> -		reg = <0xff500000 0x10000>;
>> -		resets = <&rst HPS2FPGA_RESET>;
>> -		clocks = <&l4_main_clk>;
>> -		bridge-enable = <1>;
>> -	};
>> -
>> -	fpga_bridge2: fpga-bridge@ff600000 {
>> -		compatible = "altr,socfpga-fpga2hps-bridge";
>> -		reg = <0xff600000 0x100000>;
>> -		resets = <&rst FPGA2HPS_RESET>;
>> -		clocks = <&l4_main_clk>;
>> -	};
>> diff --git a/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.yaml b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.yaml
>> new file mode 100644
>> index 000000000000..f8210449dfed
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.yaml
>> @@ -0,0 +1,63 @@
> 
> Is the License identifier also needed?

yes it is. Will add in v2. Checkpatch didn't catch it. :-(

Thanks,
Michal