Received: by 2002:a05:7412:98c1:b0:fa:551:50a7 with SMTP id kc1csp1596139rdb; Mon, 8 Jan 2024 04:38:40 -0800 (PST) X-Google-Smtp-Source: AGHT+IG2b/zL87zXsLm8AqzH4i7Na37RpRRJzx/UioLLZAV4K3taVvzaXfZZxeGTnH+sQm7SRRhn X-Received: by 2002:a17:906:6bcb:b0:a29:a8b3:f4fb with SMTP id t11-20020a1709066bcb00b00a29a8b3f4fbmr1415822ejs.129.1704717520744; Mon, 08 Jan 2024 04:38:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1704717520; cv=none; d=google.com; s=arc-20160816; b=Jk0XahYuvn/+79khAncXH6W6AE5E6hFGIee6Lgkk7AM3WP27tUhUuoMETdGoMFjepW LA1nGY8fwGqaNCemSxQ54ONEgZEW9yC3Y40HhWCS36D/Cvx5/BJyd+otMF4aQ1YzUJDx cWjKbp/6u18Swiiv7/rFsfTBFG83PpXxz9OaznaX+uNoe33fZ2J8x8HJOsIcJQFerGhl nZnrHPEL6OWVqhXtTGjbF0Pjx5YJaU7eME1GtASurZcJJPXFFCYs8OYVVd7FDq6sWRzJ HgfgZmwhpi/RFQotP6wwXlps5miJYejG9LGWoxYILr9rAhL4x+l5NHxYaM1XrzCCXOGd dTaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:list-unsubscribe:list-subscribe:list-id:precedence :subject:date:from:dkim-signature; bh=Da5WEFJ7Rox0nWyoU5Lxh9Tri/61lPju+1E7YeaEqkE=; fh=xaSuZj1ajbxHn52v8M2SiBWQNwlImHP6rQYKWo0AWtU=; b=rGXHqAxWfBsxi/wEg164iNdu7ANONpllYnDWzs7qdNyAICeBmA9otLfbTiJ1Ybja8X 7Q8tKog15s9mJrFWLOheqp44bEbex6nHXqR9PPUQT1298Fu5hrQXl2jbXKAEcL5tdwY1 NDx8LjrfcDikBP+YSX/WBQ0XIYDgTHGw0enjcBp0Wi/TiwbQxVHspDsQOipS+7Wl5Dg2 NNcvagEoPawWCrpmxZMDjQpUw+0fvvy3t9ZO6mKusanz6/xIZT/PBtyWpmZ/cHf2Eyx0 Zsmpb0jrNGfMPYAn7+yOTWhc/GhwAB1SNkInQhBPnKMb0M76Tgx0itI7L6FXkHTR2tr2 bszA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JxNFTI0M; spf=pass (google.com: domain of linux-kernel+bounces-19525-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-19525-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id cf5-20020a170906b2c500b00a26a5f8cd6asi3023100ejb.145.2024.01.08.04.38.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 04:38:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-19525-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JxNFTI0M; spf=pass (google.com: domain of linux-kernel+bounces-19525-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-19525-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 809DB1F22CF4 for ; Mon, 8 Jan 2024 12:38:40 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 84195524D8; Mon, 8 Jan 2024 12:32:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="JxNFTI0M" X-Original-To: linux-kernel@vger.kernel.org Received: from mail-ej1-f51.google.com (mail-ej1-f51.google.com [209.85.218.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25FC35103D for ; Mon, 8 Jan 2024 12:32:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Received: by mail-ej1-f51.google.com with SMTP id a640c23a62f3a-a29a4f610b1so178359766b.3 for ; Mon, 08 Jan 2024 04:32:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1704717156; x=1705321956; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Da5WEFJ7Rox0nWyoU5Lxh9Tri/61lPju+1E7YeaEqkE=; b=JxNFTI0MZuhNAVbfoZLQu7P9FvabwFbf6Q+AfCnt24bj3tVdIGjrxcLcB+fBuOWR/+ uTL9ska02NIoiiEs2R7Nqp3FbWZN0YP3UoYTCDCAqCQYzlR8sANI8t/1epKGMnTE9EUd y2x5TDg5QiCJcd6BLP8OC4kWRGpZg2KC7/54XzVrDHgKgSBnwwL/UvJk6JJ4myMoykXZ keANuGLvt9XwG23Tz53SNIMjyTWtWeFf8b91OphWO6PtG38S8DDtkVH3HPQSa9lRsgeV doVA1+gswN/WnfDKXXRLBCoi5X8J0vuhcHlLs8i00dnhVPM2nF5TybxLOVefi2WP+PuK JKsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704717156; x=1705321956; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Da5WEFJ7Rox0nWyoU5Lxh9Tri/61lPju+1E7YeaEqkE=; b=rnFOc8GRhMO4NSXdRwTuZawvwNgbIqPHOh8eEFp0Tjmtb3hApy68Wa7rOu5rF74Rus 95BAx7dDF8n3m6UApXM5oFs8U8StGlDfzQHLKxg+37Qoe9OIWO3ACEWeZl9trn0FIZ+W ZArnl4Gb0kp5YZ2snI8oBRVHKc0LXVrtr0Puxf6O36+5ZFwgBbN6pB1/G39OrlHz5O/j fv/5oTZYIdxftxBblFKr7jCmABMjwVvEmxABTJ20AOESJ5Zs+1eBfMNlrbLeXBVjIiYf umOv/cJMTW9RvH2l2FYf6D6WxpqRhxr/MeHQaItWrg7EJ/BP2gDNs496k32y5/FW7M6E VL1g== X-Gm-Message-State: AOJu0YzV+f1+FXPSovjFlpHNEbOB7EzlEqJHPNY7AGakqQIUzQ/51JQ5 QO4MrWH6Z+1c1M7/eU5v4H01Pqy0T5PKbolRynbGfkrhfjg= X-Received: by 2002:a17:906:260c:b0:a27:f7a1:2ad2 with SMTP id h12-20020a170906260c00b00a27f7a12ad2mr973815ejc.69.1704717156067; Mon, 08 Jan 2024 04:32:36 -0800 (PST) Received: from [10.167.154.1] (178235179081.dynamic-4-waw-k-1-3-0.vectranet.pl. [178.235.179.81]) by smtp.gmail.com with ESMTPSA id bs18-20020a170906d1d200b00a2808ee8ab1sm3892978ejb.150.2024.01.08.04.32.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 04:32:35 -0800 (PST) From: Konrad Dybcio Date: Mon, 08 Jan 2024 13:32:20 +0100 Subject: [PATCH 03/18] clk: qcom: reset: Ensure write completion on reset de/assertion Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240105-topic-venus_reset-v1-3-981c7a624855@linaro.org> References: <20240105-topic-venus_reset-v1-0-981c7a624855@linaro.org> In-Reply-To: <20240105-topic-venus_reset-v1-0-981c7a624855@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Philipp Zabel Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue , Dikshita Agarwal , Vikash Garodia , Konrad Dybcio , Manivannan Sadhasivam X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1704717148; l=1265; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=JNyercWD/irj0WnMZM+/XNK5jH058/unr+ghbvtjtsA=; b=PiEP2x1LKi1nXUSfujrMpb2rsufCxzBXzXIuwd/XKExri1mGJnHEXZM3mYML6D2hNcbfCq9s1 DnonS2BI0z8AfP+XkIRhdNm+Z1N1OVN22WZJpK8p9rxnLjRjT4QpIxh X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Trying to toggle the resets in a rapid fashion can lead to the changes not actually arriving at the clock controller block when we expect them to. This was observed at least on SM8250. Read back the value after regmap_update_bits to ensure write completion. Fixes: db1029814f1f ("clk: qcom: reset: Ensure write completion on reset de/assertion") Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/reset.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/reset.c b/drivers/clk/qcom/reset.c index c4ac4d18829b..57024d1a0524 100644 --- a/drivers/clk/qcom/reset.c +++ b/drivers/clk/qcom/reset.c @@ -33,7 +33,12 @@ static int qcom_reset_set_assert(struct reset_controller_dev *rcdev, unsigned lo map = &rst->reset_map[id]; mask = map->bitmask ? map->bitmask : BIT(map->bit); - return regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); + regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); + + /* Read back the register to ensure write completion, ignore the value */ + regmap_read(rst->regmap, map->reg, &mask); + + return 0; } static int qcom_reset_assert(struct reset_controller_dev *rcdev, unsigned long id) -- 2.43.0