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[178.235.179.81]) by smtp.gmail.com with ESMTPSA id bs18-20020a170906d1d200b00a2808ee8ab1sm3892978ejb.150.2024.01.08.04.32.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 04:32:44 -0800 (PST) From: Konrad Dybcio Date: Mon, 08 Jan 2024 13:32:25 +0100 Subject: [PATCH 08/18] clk: qcom: gcc-sm7150: Set delay for Venus CLK resets Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240105-topic-venus_reset-v1-8-981c7a624855@linaro.org> References: <20240105-topic-venus_reset-v1-0-981c7a624855@linaro.org> In-Reply-To: <20240105-topic-venus_reset-v1-0-981c7a624855@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Philipp Zabel Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue , Dikshita Agarwal , Vikash Garodia , Konrad Dybcio , Manivannan Sadhasivam X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1704717148; l=827; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=SneXieVlJPscW7pjYlUwK7ABSP0X3okszmbJYTG0dt0=; b=eaRYkxYRjkbNuCEQzJUl2KGLBnwFikuQ+kTndvPt1ihUlqeYTs6qwdLG9QV2IvrDzqz9pYK34 tN2D+vF6ovjC3xSMoXGUr24x7nRRf36hu06P4J04CMVqVGP2glA/1OY X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Some Venus resets may require more time when toggling. Describe that. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/gcc-sm7150.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gcc-sm7150.c b/drivers/clk/qcom/gcc-sm7150.c index d9983bb27475..7c5596331c30 100644 --- a/drivers/clk/qcom/gcc-sm7150.c +++ b/drivers/clk/qcom/gcc-sm7150.c @@ -2918,7 +2918,7 @@ static const struct qcom_reset_map gcc_sm7150_resets[] = { [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 }, [GCC_USB3_PHY_SEC_BCR] = { 0x5000c }, [GCC_QUSB2PHY_PRIM_BCR] = { 0x26000 }, - [GCC_VIDEO_AXI_CLK_BCR] = { 0xb01c, 2 }, + [GCC_VIDEO_AXI_CLK_BCR] = { .reg = 0xb01c, .bit = 2, .udelay = 150 }, }; static const struct clk_rcg_dfs_data gcc_sm7150_dfs_desc[] = { -- 2.43.0