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[209.17.68.221]) by smtp.gmail.com with ESMTPSA id u13-20020a170902e5cd00b001d09c5424d4sm6321570plf.297.2024.01.08.06.30.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 06:30:08 -0800 (PST) Date: Mon, 8 Jan 2024 23:30:06 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Jianjun Wang Cc: Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas , Matthias Brugger , AngeloGioacchino Del Regno , Ryder Lee , linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, qizhong.cheng@mediatek.com, stable@vger.kernel.org Subject: Re: [PATCH v4] PCI: mediatek: Clear interrupt status before dispatching handler Message-ID: <20240108143006.GA2602112@rocinante> References: <20231211094923.31967-1-jianjun.wang@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231211094923.31967-1-jianjun.wang@mediatek.com> Hello, > We found a failure when used iperf tool for wifi performance testing, > there are some MSIs received while clearing the interrupt status, > these MSIs cannot be serviced. > > The interrupt status can be cleared even the MSI status still remaining, > as an edge-triggered interrupts, its interrupt status should be cleared > before dispatching to the handler of device. Applied to controller/mediatek, thank you! [1/1] PCI: mediatek: Clear interrupt status before dispatching handler https://git.kernel.org/pci/pci/c/4fea201e110e Krzysztof