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bh=JhcmxUh8JpNw9VG2lpkQDwxahGUDO7wjwTVRAGTPxjA=; b=f1SYRm1gQ/9/QFLv1nuiAeVxomwqR4RM+v9tgs3R9b+rfycS5ie7vsGZKsetciyfdw z6koTQzaLxn+eqvddYavmNH2FpYZ6e4WJ7lyEpKHLivapalE+rVnFLB4sieNNM4JNGF9 x3mXRHVBLFOFn+d727HoS/aQ8eWsM6Vc/IglJN3YdQZjBi0Agpmg++yIj3tde+O1bI6e LOL/n0IkCAjCFf5AimI6YNIhk+q7paV5rQDM0PJ2OpGUKIqrym/vT+0pnLsMp4Qgb/HE Al45uqSPYHcAYR9S0KWDMsWFuKajY+KVyBOXMg4NYsgGNlzzq+cveKM57ioepWyndvEg x64A== X-Gm-Message-State: AOJu0YzPKwdlUaLo2x/QEgHflKDgnoBP0LIuNR2cCQTq79lXcbNBz86c LLfgDFWDFSWIPj8uadbJbCXPRIwZwQjw/GoL5K/jyaaI85vzsBorbwDFhP2e9pY= X-Received: by 2002:a2e:9a84:0:b0:2cc:6fef:d80a with SMTP id p4-20020a2e9a84000000b002cc6fefd80amr1741294lji.4.1704734142596; Mon, 08 Jan 2024 09:15:42 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20231215-ad7380-mainline-v3-0-7a11ebf642b9@baylibre.com> <20231215-ad7380-mainline-v3-1-7a11ebf642b9@baylibre.com> <20240107164356.3e8df266@jic23-huawei> <0a774bc6-3bf9-4b5f-92e0-8bd673e71a33@sirena.org.uk> In-Reply-To: <0a774bc6-3bf9-4b5f-92e0-8bd673e71a33@sirena.org.uk> From: David Lechner Date: Mon, 8 Jan 2024 11:15:31 -0600 Message-ID: Subject: Re: [PATCH v3 1/3] dt-bindings: spi: add spi-rx-bus-channels peripheral property To: Mark Brown Cc: Jonathan Cameron , linux-iio@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?UTF-8?B?TnVubyBTw6E=?= , Liam Girdwood , linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, Jan 8, 2024 at 10:39=E2=80=AFAM Mark Brown wro= te: > > On Sun, Jan 07, 2024 at 05:02:56PM -0600, David Lechner wrote: > > On Sun, Jan 7, 2024 at 3:27=E2=80=AFPM Mark Brown = wrote: > > > > This makes no sense to me without a corresponding change in the SPI c= ore > > > and possibly controller support, though I guess you could do data > > > manging to rewrite from a normal parallel SPI to this for a pure > > > software implementation. I also see nothing in the driver that even > > > attempts to parse this so I can't see how it could possibly work. > > > We currently don't have a controller that supports this. This is just > > an attempt to make a complete binding for a peripheral according to > > [2] which says: > > ... > > > So, will DT maintainers accept an incomplete binding for the > > peripheral? Or will you reconsider this without SPI core support if I > > can explain it better? It doesn't seem like a reasonable request to > > expect us to spend time developing software that we don't need at this > > time just to get a complete DT binding accepted for a feature that > > isn't being used. > > I don't think it's sensible to try to make a binding for this without > having actually tried to put a system together that uses it and made > sure that everything is joined up properly, the thing about complete > bindings is more for things that are handle turning than for things that > are substantial new features in subsystems. We do have plans to eventually implement such a feature in an FPGA-based SPI controller, so if we need to wait until then for the binding, then we can do that. But it would be really nice if we could find a way forward for the IIO driver in this series without having to wait for the resolution of new SPI controller feature for the complete DT bindings. DT/IIO maintainers, if I resubmit this series with the `spi-rx-bus-channels` parts removed from the iio/adc/adi,ad7380.yaml bindings, would that be acceptable? (Also resubmitting without this patch of course.)