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Message-ID: <3bfaab38-6831-41f8-8a7b-9f1f434e0f9c@amd.com>
Date: Tue, 9 Jan 2024 09:06:52 +0100
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Subject: Re: [PATCH 1/2] dt-bindings: fpga: Convert bridge binding to yaml
Content-Language: en-US
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
 Xu Yilun <yilun.xu@linux.intel.com>
Cc: linux-kernel@vger.kernel.org, monstr@monstr.eu, michal.simek@xilinx.com,
 git@xilinx.com, Conor Dooley <conor+dt@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
 Moritz Fischer <mdf@kernel.org>, Rob Herring <robh+dt@kernel.org>,
 Tom Rix <trix@redhat.com>, Wu Hao <hao.wu@intel.com>,
 Xu Yilun <yilun.xu@intel.com>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@vger.kernel.org>, kishore Manne <nava.kishore.manne@amd.com>,
 "open list:FPGA MANAGER FRAMEWORK" <linux-fpga@vger.kernel.org>
References: <3100bbc4723643ec1ec7d4548e9ab353c856b564.1704470663.git.michal.simek@amd.com>
 <ab6a9a0e-ab03-4d35-9e43-c90c22dbcb1d@linaro.org>
 <4bcac34b-72a0-464e-91cd-d9e924073619@amd.com>
 <ZZzDHxnMPTuraS4D@yilunxu-OptiPlex-7050>
 <bd356c60-7681-47e4-b45f-d25e70068b65@linaro.org>
From: Michal Simek <michal.simek@amd.com>
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On 1/9/24 09:00, Krzysztof Kozlowski wrote:
> On 09/01/2024 04:53, Xu Yilun wrote:
>> On Mon, Jan 08, 2024 at 10:16:17AM +0100, Michal Simek wrote:
>>>
>>>
>>> On 1/8/24 10:09, Krzysztof Kozlowski wrote:
>>>> On 05/01/2024 17:04, Michal Simek wrote:
>>>>> Convert the generic fpga bridge DT binding to json-schema.
>>>>>
>>>>> Signed-off-by: Michal Simek <michal.simek@amd.com>
>>>>
>>>>> +$id: http://devicetree.org/schemas/fpga/fpga-bridge.yaml#
>>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>>> +
>>>>> +title: FPGA Bridge
>>>>> +
>>>>> +maintainers:
>>>>> +  - Michal Simek <michal.simek@amd.com>
>>>>> +
>>>>> +properties:
>>>>> +  $nodename:
>>>>> +    pattern: "^fpga-bridge(@.*)?$"
>>>>
>>>> Not sure, but maybe we need to allow fpga-bridge-1? Could we have more
>>>> than one bridge on given system?
>>>
>>> Yilun: Any comment on this?
>>
>> We can have more bridges, but IIUC people use fpga-bridge@0, fpga-bridge@0
>> to identify them. So the expression is OK to me.
> 
> So you claim unit address thus reg with some sort of bus address is a
> requirement? Then "?" is not correct in that pattern.

I expect it is about that people are using fpga-bridge@0 but bridge is not on 
the bus. Yilun said that reg property in altr,socfpga-fpga2sdram-bridge.yaml is 
optional which means no reg property no @XXX in node name.
That's why I think that expression is correct. If there are more bridges without 
reg property then I expect we need to get more examples to align expression.

Thanks,
Michal