Received-SPF: pass (google.com: domain of linux-kernel+bounces-20713-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99;
Date: Tue, 9 Jan 2024 18:22:13 +0800
From: Xu Yilun <yilun.xu@linux.intel.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Michal Simek <michal.simek@amd.com>, linux-kernel@vger.kernel.org,
	monstr@monstr.eu, michal.simek@xilinx.com, git@xilinx.com,
	Conor Dooley <conor+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Moritz Fischer <mdf@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Tom Rix <trix@redhat.com>, Wu Hao <hao.wu@intel.com>,
	Xu Yilun <yilun.xu@intel.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>,
	kishore Manne <nava.kishore.manne@amd.com>,
	"open list:FPGA MANAGER FRAMEWORK" <linux-fpga@vger.kernel.org>
Subject: Re: [PATCH 1/2] dt-bindings: fpga: Convert bridge binding to yaml
Message-ID: <ZZ0eVZGcYJ0sFxh2@yilunxu-OptiPlex-7050>
References: <3100bbc4723643ec1ec7d4548e9ab353c856b564.1704470663.git.michal.simek@amd.com>
 <ab6a9a0e-ab03-4d35-9e43-c90c22dbcb1d@linaro.org>
 <4bcac34b-72a0-464e-91cd-d9e924073619@amd.com>
 <ZZzDHxnMPTuraS4D@yilunxu-OptiPlex-7050>
 <bd356c60-7681-47e4-b45f-d25e70068b65@linaro.org>
 <3bfaab38-6831-41f8-8a7b-9f1f434e0f9c@amd.com>
 <e88205a2-f8b6-42c7-82cc-bfc08a680f3d@linaro.org>
 <f3aeff02-2560-46e7-a712-1f8d323f43a4@linaro.org>
Precedence: bulk
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <f3aeff02-2560-46e7-a712-1f8d323f43a4@linaro.org>

On Tue, Jan 09, 2024 at 09:16:33AM +0100, Krzysztof Kozlowski wrote:
> On 09/01/2024 09:15, Krzysztof Kozlowski wrote:
> >>>>>>> +properties:
> >>>>>>> +  $nodename:
> >>>>>>> +    pattern: "^fpga-bridge(@.*)?$"
> >>>>>>
> >>>>>> Not sure, but maybe we need to allow fpga-bridge-1? Could we have more
> >>>>>> than one bridge on given system?
> >>>>>
> >>>>> Yilun: Any comment on this?
> >>>>
> >>>> We can have more bridges, but IIUC people use fpga-bridge@0, fpga-bridge@0
> >>>> to identify them. So the expression is OK to me.
> >>>
> >>> So you claim unit address thus reg with some sort of bus address is a
> >>> requirement? Then "?" is not correct in that pattern.
> >>
> >> I expect it is about that people are using fpga-bridge@0 but bridge is not on 
> >> the bus. Yilun said that reg property in altr,socfpga-fpga2sdram-bridge.yaml is 
> >> optional which means no reg property no @XXX in node name.
> >> That's why I think that expression is correct. If there are more bridges without 
> >> reg property then I expect we need to get more examples to align expression.
> > 
> > If we allow node name without unit address, thus not being part of any

This is valid usecase.

> > bus, then the only question is whether it is possible to have system
> > with more than two FPGA bridges. If the answer is "yes", which I think

The answer is yes.

> > is the case, then the pattern should already allow it:
> > 
> > (@[0-9a-f]+|-[0-9]+)?
> 
> Or better go with what I used recently for narrowed choices:
> 
> (@.*|-([0-9]|[1-9][0-9]+))?

It is good to me.

I actually didn't know much about DTS & its Schema, thanks for all your
input.

> 
> Best regards,
> Krzysztof
> 
>