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Date: Wed, 10 Jan 2024 14:35:10 +0100
From: Andrew Lunn <andrew@lunn.ch>
To: Luo Jie <quic_luoj@quicinc.com>
Cc: andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org,
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	quic_leiwei@quicinc.com
Subject: Re: [PATCH 3/6] arm64: dts: qcom: ipq5332: Add MDIO device tree
Message-ID: <4bc0aff5-8a1c-44a6-89d8-460961a61310@lunn.ch>
References: <20240110112059.2498-1-quic_luoj@quicinc.com>
 <20240110112059.2498-4-quic_luoj@quicinc.com>
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In-Reply-To: <20240110112059.2498-4-quic_luoj@quicinc.com>

On Wed, Jan 10, 2024 at 07:20:56PM +0800, Luo Jie wrote:
> Add the MDIO device tree of ipq5332.
> 
> Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/ipq5332.dtsi | 44 +++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> index bc89480820cb..e6c780e69d6e 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> @@ -214,6 +214,38 @@ serial_0_pins: serial0-state {
>  				drive-strength = <8>;
>  				bias-pull-up;
>  			};
> +
> +			mdio0_pins: mdio0-state {
> +				mux_0 {
> +					pins = "gpio25";
> +					function = "mdc0";
> +					drive-strength = <8>;
> +					bias-disable;
> +				};
> +
> +				mux_1 {
> +					pins = "gpio26";
> +					function = "mdio0";
> +					drive-strength = <8>;
> +					bias-pull-up;
> +				};
> +			};
> +
> +			mdio1_pins: mdio1-state {
> +				mux_0 {
> +					pins = "gpio27";
> +					function = "mdc1";
> +					drive-strength = <8>;
> +					bias-disable;
> +				};
> +
> +				mux_1 {
> +					pins = "gpio28";
> +					function = "mdio1";
> +					drive-strength = <8>;
> +					bias-pull-up;
> +				};

I don't know why i'm asking this, because i don't really expect a
usable answer. What sort of MUX is this? Should you be using one of
the muxes in drivers/net/mdio/mdio-mux-* or something similar?

    Andrew