Received: by 2002:a05:7412:e794:b0:fa:551:50a7 with SMTP id o20csp1011044rdd; Wed, 10 Jan 2024 06:14:38 -0800 (PST) X-Google-Smtp-Source: AGHT+IFkQsWCGD1xhYVZRF3emtMWlY6V829a3e2iIA4x5jKmnuFQ0knDD7TFpXWOauTjpXL+fi+l X-Received: by 2002:a17:90b:1252:b0:28b:ce48:c69a with SMTP id gx18-20020a17090b125200b0028bce48c69amr712781pjb.58.1704896078489; Wed, 10 Jan 2024 06:14:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1704896078; cv=none; d=google.com; s=arc-20160816; b=f3/crru5GwJXqJ4W9RUCYcfCJeAQW+OMKxvC/V1ERNPVFJXPPxTJfj/s05k7ng11mv 4kNFL50euLH5TAujQKjN3eMIj80V5fsnNxwrP5c98iTOMWo9bnGK3XOGMRLhmbL6m/Hu Ui/8ge7rNrnF+Ozwh4rsC1jwf8mC9zigprpU+ulJKGJLqTmSMl/B+wZaI1seXKimv5sm DaeFnEdOy/8ZCGjDTooNJIX9+ac8TjJJgwPQInftDV6oxFwMLbdtG4VkwZjQHMRU1yNn aiHIVe93YcTM4uZxtT2ev9E4lcAeMVF0seArk9Eo6vcfbWun6TQzpq57PPydC4+mf9tb GQhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=in-reply-to:content-disposition:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:message-id:subject:cc :to:from:date:dkim-signature; bh=ZtsRlxa5HKdDvF/19R39tmp+/qLm0R+hIagtTceQ7MQ=; fh=Mm6LPz13IUZ8AIjUATDnEulQSYdEvNELBLj/GMAof6k=; b=vmqHupgjl+DKWx0qoyuzaIDZ7HYZD7K+a80SjJRnrhSx2f9AdStV4qrsm3A8DIyaGt OMjIrffRF5xFRwdULTv+vhL8vgi38/Y7YEAN+PwOhoJlYYa1clB54qfqCmubYA1oCYik Rdur0ma86Dc7drveaE20r7Y3e1j6Cx7BavZtKN5xr/H8oqkyFkMQ/tMGpKQAnw7r/WJy 7nr68qtTQ5jB07sqA3x0GnVKGJVX1ZZTFzU0fZqbF/kRCOqY7XBpzemWpidoCsfEorOU AmJXRIzzuEIgJTLqBhZI76HcGp3RqVt7GVb5FMGuI4IHliTMdHxBO5xtz6jtH7cWkZpz Ysrg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=oRycpO1R; spf=pass (google.com: domain of linux-kernel+bounces-22324-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-22324-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [139.178.88.99]) by mx.google.com with ESMTPS id w4-20020a17090abc0400b0028d44a31c24si1465083pjr.54.2024.01.10.06.14.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 06:14:38 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-22324-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=oRycpO1R; spf=pass (google.com: domain of linux-kernel+bounces-22324-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-22324-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 6390E281530 for ; Wed, 10 Jan 2024 14:14:17 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DD4DC4C630; Wed, 10 Jan 2024 14:10:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oRycpO1R" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 16A604C60B; Wed, 10 Jan 2024 14:10:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 39C4EC433F1; Wed, 10 Jan 2024 14:10:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1704895840; bh=eY10UxSczupCveV5wCR/tuzRKmbvyyPqzGr7zHPzSe4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=oRycpO1REDWemAYzGCy71bi5syZzypvnGLZFml/7L23ZdPXbJpGrpExWnEYXVnhCO 3QIukT2p021LLY324GJ0hpNzicFUCNt93DPJKDfrlS2EMhc/QEvtZIEZAHHnkYh/Sa QfnbtplBKkJCY+DN876SM5sljL9/BzO6tzfDg0KFozNjo+86DDQ/TTJehbcVXbyWBo IVx77egR2tIh6V+zn7nZL2IP1k2fHe4brbrsBL9f0PeZwTqE2xKI3mfmnwsp2YfiwA puIskItzVWI6OT27l2oRmyFe+IFvFOzRa7Kd2BMlQUN4YBnEQXeSaZ+5eSekV+kAz9 CCHIBlaYc3TUw== Date: Wed, 10 Jan 2024 21:57:50 +0800 From: Jisheng Zhang To: Conor Dooley Cc: Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 0/3] riscv: dts: starfive: add Milkv Mars board device tree Message-ID: References: <20231202153353.635-1-jszhang@kernel.org> <20240110-eternal-proofing-8a33201ff727@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20240110-eternal-proofing-8a33201ff727@spud> On Wed, Jan 10, 2024 at 01:53:11PM +0000, Conor Dooley wrote: > On Sat, Dec 02, 2023 at 02:07:50PM -0800, Emil Renner Berthing wrote: > > Jisheng Zhang wrote: > > > The Milkv Mars is a development board based on the Starfive JH7110 SoC. > > > The board features: > > > > > > - JH7110 SoC > > > - 1/2/4/8 GiB LPDDR4 DRAM > > > - AXP15060 PMIC > > > - 40 pin GPIO header > > > - 3x USB 3.0 host port > > > - 1x USB 2.0 host port > > > - 1x M.2 E-Key > > > - 1x eMMC slot > > > - 1x MicroSD slot > > > - 1x QSPI Flash > > > - 1x 1Gbps Ethernet port > > > - 1x HDMI port > > > - 1x 2-lane DSI and 1x 4-lane DSI > > > - 1x 2-lane CSI > > > > > > patch1 adds 'cpus' label > > > patch2 adds "milkv,mars" board dt-binding > > > patch3 adds the devicetree file describing the currently supported > > > features: > > > Namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet. > > > > > > Since v1: > > > - add two new patches which add "cpus" label and board dt-binding > > > - adopt Krzysztof's suggestions, thanks > > > > > > Hi Conor, > > > > > > I see you have sent a patch which moves the timebase-frequency property > > > to soc dtsi, but this series doesn't rebase on that. I can update it > > > once your patch is merged. > > > > Hi Jisheng, > > > > Thanks for working on this! On the JH7110 the mtime derives almost directly > > from the external oscillator like this: > > > > osc (24MHz) -> rtc_toggle (div 6) -> mtime (4MHz) > > > > So to me it makes sense to define the timebase-frequency in the same file as > > the frequency of the external oscillator. > > > > In general it looks good, but if you do > > > > diff -Naur jh7110-{starfive-visionfive-2.dtsi,milkv-mars.dts} > > > > you'll see that those two files are almost identical. Even external clock > > speeds and all the pin configuration are the same. I'd strongly prefer to have > > all that factored out in a common .dtsi so fixes don't get out of sync. > > I'm gonna mark this as changes requested on patchwork because of this > comment. LMK if you don't think this is worth another version Emil. Yeah a new version is needed. And I think it's a bit late for this window, so the new version will be out once v6.8-rc1 is out. Thanks