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The number of CAMSVs depend on the SoC model. + +properties: + compatible: + const: mediatek,mt8365-camsv + + reg: + items: + - description: camsv base + - description: img0 base + - description: tg base + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + items: + - description: cam clock + - description: camtg clock + - description: camsv clock + + clock-names: + items: + - const: cam + - const: camtg + - const: camsv + + iommus: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: connection point for camsv0 + + required: + - port@0 + +required: + - compatible + - interrupts + - clocks + - clock-names + - power-domains + - iommus + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camsv1: camsv@15050000 { + compatible = "mediatek,mt8365-camsv"; + reg = <0 0x15050000 0 0x0040>, + <0 0x15050208 0 0x0020>, + <0 0x15050400 0 0x0100>; + interrupts = ; + clocks = <&camsys CLK_CAM>, + <&camsys CLK_CAMTG>, + <&camsys CLK_CAMSV0>; + clock-names = "cam", "camtg", "camsv"; + iommus = <&iommu M4U_PORT_CAM_IMGO>; + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + camsv1_endpoint: endpoint { + remote-endpoint = <&seninf_camsv1_endpoint>; + }; + }; + }; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index 4444e719cf8e..3ea2158864e1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13616,6 +13616,7 @@ M: Laurent Pinchart M: Julien Stephan M: Andy Hsieh S: Supported +F: Documentation/devicetree/bindings/media/mediatek,mt8365-camsv.yaml F: Documentation/devicetree/bindings/media/mediatek,mt8365-seninf.yaml MEDIATEK SMI DRIVER -- 2.43.0