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Message-ID: <4e9cc473-dbab-4e7c-ac7f-871a4025ef5b@linaro.org>
Date: Wed, 10 Jan 2024 22:01:41 +0100
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Subject: Re: [PATCH v22 5/8] arm64: dts: nuvoton: npcm8xx: add clock reset
 syscon node
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To: Tomer Maimon <tmaimon77@gmail.com>, mturquette@baylibre.com,
 sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
 tali.perry1@gmail.com, joel@jms.id.au, venture@google.com, yuenn@google.com,
 benjaminfair@google.com
Cc: openbmc@lists.ozlabs.org, linux-clk@vger.kernel.org,
 linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
References: <20240108135421.684263-1-tmaimon77@gmail.com>
 <20240108135421.684263-6-tmaimon77@gmail.com>
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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In-Reply-To: <20240108135421.684263-6-tmaimon77@gmail.com>
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On 08/01/2024 14:54, Tomer Maimon wrote:
> Add clock reset syscon node to handle reset and clock registers
> controllers.
> 
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> ---
>  arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
> index 9c4df91031e7..7d5956e2c9f3 100644
> --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
> +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
> @@ -22,6 +22,11 @@ gcr: system-controller@f0800000 {
>  			reg = <0x0 0xf0800000 0x0 0x1000>;
>  		};
>  
> +		clk_rst: syscon@f0801000 {
> +			compatible = "nuvoton,npcm845-clk-rst", "syscon", "simple-mfd";

This is not a simple-mfd. No children,

> +			reg = <0x0 0xf0801000 0x0 0xC4>;

Use lowercase hex. Please store this feedback in your checklist and do
not repeat the same mistakes in further submissions.

Best regards,
Krzysztof