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[147.75.80.249]) by mx.google.com with ESMTPS id o15-20020a17090637cf00b00a2c0f6bbc1bsi283503ejc.865.2024.01.11.00.19.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 00:19:44 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-23199-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Tq2IixP3; spf=pass (google.com: domain of linux-kernel+bounces-23199-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-23199-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 5D1ED1F221A1 for ; Thu, 11 Jan 2024 08:19:44 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1DD02DDD3; Thu, 11 Jan 2024 08:19:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Tq2IixP3" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97FCCE544; Thu, 11 Jan 2024 08:19:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704961171; x=1736497171; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=bbcFhRoQMghAzNGhNxuNhvBNhm3SUfDuTtzO00WTbgU=; b=Tq2IixP3OcO7L4odEv4CYm4mxiuPNP8f5HHucFoukRCTXr/IOdNu7sgf +VQOC+LBYcIsMB7jvte+7Wnyul2TkX5nIGfcGREKL+dFtHRR8NtIOrUX4 fNICFMRpE89xKLKDnBAke5hnaOeWzWc1RC4KLCfK7IEOFgt6hB3L4LK7r jhpNAFtf8k5gEooIMG4Jl2k5sG2zT/uhI3R3HspHNQI/GLT+AaVHTQvt+ e6Ecx3SPR1bx8dVYA+3apFhNdiDzFVFx9KSomBFoxcjg4UG4MXYg0C0RY RBDA4QTYTRCpRl25lPMBi4F8kZSyIIYzZFudEll+o5Ns/PUHbp8BJ8jZr A==; X-IronPort-AV: E=McAfee;i="6600,9927,10949"; a="465166282" X-IronPort-AV: E=Sophos;i="6.04,185,1695711600"; d="scan'208";a="465166282" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2024 00:19:30 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10949"; a="925923001" X-IronPort-AV: E=Sophos;i="6.04,185,1695711600"; d="scan'208";a="925923001" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.252.52.224]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2024 00:19:25 -0800 From: Adrian Hunter To: Peter Zijlstra Cc: Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , Ian Rogers , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: [PATCH V4 00/11] perf/core: Add ability for an event to "pause" or "resume" AUX area tracing Date: Thu, 11 Jan 2024 10:19:03 +0200 Message-Id: <20240111081914.3123-1-adrian.hunter@intel.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: 8bit Hi Hardware traces, such as instruction traces, can produce a vast amount of trace data, so being able to reduce tracing to more specific circumstances can be useful. The ability to pause or resume tracing when another event happens, can do that. These patches add such a facilty and show how it would work for Intel Processor Trace. Maintainers of other AUX area tracing implementations are requested to consider if this is something they might employ and then whether or not the ABI would work for them. Changes to perf tools are now (since V4) fleshed out. Changes in V4: perf/core: Add aux_pause, aux_resume, aux_start_paused Rename aux_output_cfg -> aux_action Reorder aux_action bits from: aux_pause, aux_resume, aux_start_paused to: aux_start_paused, aux_pause, aux_resume Fix aux_action bits __u64 -> __u32 coresight: Have a stab at support for pause / resume Dropped perf tools All new patches Changes in RFC V3: coresight: Have a stab at support for pause / resume 'mode' -> 'flags' so it at least compiles Changes in RFC V2: Use ->stop() / ->start() instead of ->pause_resume() Move aux_start_paused bit into aux_output_cfg Tighten up when Intel PT pause / resume is allowed Add an example of how it might work for CoreSight Adrian Hunter (11): perf/core: Add aux_pause, aux_resume, aux_start_paused perf/x86/intel/pt: Add support for pause / resume perf tools: Enable evsel__is_aux_event() to work for ARM/ARM64 perf tools: Enable evsel__is_aux_event() to work for S390_CPUMSF perf tools: Add aux_start_paused, aux_pause and aux_resume perf tools: Add aux-action config term perf tools: Parse aux-action perf tools: Add missing_features for aux_start_paused, aux_pause, aux_resume perf intel-pt: Improve man page format perf intel-pt: Add documentation for pause / resume perf intel-pt: Add a test for pause / resume arch/x86/events/intel/pt.c | 63 +++- arch/x86/events/intel/pt.h | 4 + include/linux/perf_event.h | 15 + include/uapi/linux/perf_event.h | 11 +- kernel/events/core.c | 72 +++- kernel/events/internal.h | 1 + tools/include/uapi/linux/perf_event.h | 11 +- tools/perf/Documentation/perf-intel-pt.txt | 558 +++++++++++++++++------------ tools/perf/Documentation/perf-record.txt | 4 + tools/perf/arch/arm/util/pmu.c | 3 + tools/perf/builtin-record.c | 4 +- tools/perf/tests/shell/test_intel_pt.sh | 28 ++ tools/perf/util/auxtrace.c | 67 +++- tools/perf/util/auxtrace.h | 6 +- tools/perf/util/evsel.c | 13 +- tools/perf/util/evsel.h | 1 + tools/perf/util/evsel_config.h | 1 + tools/perf/util/parse-events.c | 10 + tools/perf/util/parse-events.h | 1 + tools/perf/util/parse-events.l | 1 + tools/perf/util/perf_event_attr_fprintf.c | 3 + tools/perf/util/pmu.c | 6 +- 22 files changed, 645 insertions(+), 238 deletions(-) Regards Adrian