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[24.2.114.156]) by smtp.gmail.com with ESMTPSA id cg5-20020a05622a408500b00429ab4df47csm451462qtb.17.2024.01.11.06.02.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 06:02:42 -0800 (PST) Date: Thu, 11 Jan 2024 09:02:41 -0500 From: Brian Masney To: Lucas Karpinski Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] arm64: dts: qcom: sa8540p-ride: disable pcie2a node Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/2.2.10 (2023-03-25) On Tue, Jan 09, 2024 at 10:20:50AM -0500, Lucas Karpinski wrote: > pcie2a and pcie3a both cause interrupt storms to occur. However, when > both are enabled simultaneously, the two combined interrupt storms will > lead to rcu stalls. Red Hat is the only company still using this board > and since we still need pcie3a, just disable pcie2a. > > Signed-off-by: Lucas Karpinski Reviewed-by: Brian Masney To elaborate further: Leaving both pcie2a and pcie3a enabled will lead to rcu stalls and the board fails to boot when both are enabled. We have the latest firmware that we've been able to get from QC. Disabling one of the pcie nodes works around the boot issue. There's nothing interesting on pcie2a on the development board, and pcie3a is enabled because it has 10GB ethernet that works upstream. The interrupt storm on pcie3a can still occur on this platform, however that's a separate issue. Brian