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Date: Thu, 11 Jan 2024 15:41:09 +0000
From: Mark Brown <broonie@kernel.org>
To: Nuno =?iso-8859-1?Q?S=E1?= <noname.nuno@gmail.com>
Cc: David Lechner <dlechner@baylibre.com>,
	Jonathan Cameron <jic23@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Michael Hennerich <michael.hennerich@analog.com>,
	Nuno =?iso-8859-1?Q?S=E1?= <nuno.sa@analog.com>,
	Frank Rowand <frowand.list@gmail.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= <u.kleine-koenig@pengutronix.de>,
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Subject: Re: [PATCH 01/13] spi: add core support for controllers with offload
 capabilities
Message-ID: <ee19aa9e-cb51-41fb-a980-e3df579b5d35@sirena.org.uk>
References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com>
 <20240109-axi-spi-engine-series-3-v1-1-e42c6a986580@baylibre.com>
 <0c0b1954825dc174cab48060e96ddadadc18aefd.camel@gmail.com>
 <aae36622-4e05-4f16-9460-d7614fd599aa@sirena.org.uk>
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On Thu, Jan 11, 2024 at 03:11:32PM +0100, Nuno S=E1 wrote:
> On Thu, 2024-01-11 at 13:33 +0000, Mark Brown wrote:

> > I tend to agree that we shouldn't be exposing this to SPI device drivers
> > however we will want to keep track of if the unit is busy, and designing
> > it to cope with multiple offloads does seem like sensible future
> > proofing.=A0 There's also the possibility that one engine might be able=
 to

> Fair enough. But wouldn't a simple DT integer property (handled by the sp=
i core)
> to identify the offload index be easier for SPI device drivers? We could =
still
> have dedicated interfaces for checking if the unit is busy or not... The =
point
> is that we would not need an explicit get() from SPI drivers.

It feels like we'd need a get/release operation of some kind for mutual
exclusion, it's not just the discovery it's also figuring out if the
hardware is in use at a given moment.

> I'm of course assuming that one spi device can only be connected to one e=
ngine
> which seems reasonable to me.

I can see someone implementing this with for example the microcontroller
cores a lot of SoCs have in which case all bets are off.

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