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Date: Thu, 11 Jan 2024 17:30:22 +0100
From: Andrew Lunn <andrew@lunn.ch>
To: Jie Luo <quic_luoj@quicinc.com>
Cc: andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
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	quic_souravp@quicinc.com, quic_linchen@quicinc.com,
	quic_leiwei@quicinc.com
Subject: Re: [PATCH 3/6] arm64: dts: qcom: ipq5332: Add MDIO device tree
Message-ID: <61973012-3f74-4b58-9575-3bc5199f61d9@lunn.ch>
References: <20240110112059.2498-1-quic_luoj@quicinc.com>
 <20240110112059.2498-4-quic_luoj@quicinc.com>
 <4bc0aff5-8a1c-44a6-89d8-460961a61310@lunn.ch>
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In-Reply-To: <e893c298-fbfa-4ae4-9b76-72a5030a5530@quicinc.com>

> Sorry for the confusion, the pin nodes are for the MDIO and MDC, these
> PINs are used by the dedicated hardware MDIO block in the SoC. I will update
> the node name from mux_0 to MDC, mux_1 to MDIO, to make it clear. The driver
> for this node is drivers/net/mdio/mdio-ipq4019.c, it is not related to the
> mdio-mux-* code.

So these is all about pinmux.

When you say:
> PINs are used by the dedicated hardware MDIO block in the SoC

do you actually mean:

PINs are used by the two dedicated hardware MDIO blocks in the SoC.

You have two sets of mdio/mdc configurations here, so i assume there
are two MDIO hardware blocks, each being an MDIO bus master.

    Andrew