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[85.76.114.160]) by smtp.gmail.com with ESMTPSA id u3-20020ac258c3000000b0050e7d22a9b8sm520518lfo.89.2024.01.12.07.03.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 12 Jan 2024 07:03:25 -0800 (PST) Date: Fri, 12 Jan 2024 17:03:23 +0200 From: Dmitry Baryshkov To: Jie Luo CC: Krzysztof Kozlowski , andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, quic_kkumarcs@quicinc.com, quic_suruchia@quicinc.com, quic_soni@quicinc.com, quic_pavir@quicinc.com, quic_souravp@quicinc.com, quic_linchen@quicinc.com, quic_leiwei@quicinc.com Subject: Re: [PATCH 1/6] arm64: dts: qcom: ipq9574: Add PPE device tree node User-Agent: K-9 Mail for Android In-Reply-To: <6fc9e65a-709a-4923-b0b3-7c460199417a@quicinc.com> References: <20240110112059.2498-1-quic_luoj@quicinc.com> <20240110112059.2498-2-quic_luoj@quicinc.com> <6fc9e65a-709a-4923-b0b3-7c460199417a@quicinc.com> Message-ID: <1552D7D8-2D1B-4236-A5BF-02B68DC919CB@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On 12 January 2024 16:40:02 EET, Jie Luo wrote: > > >On 1/12/2024 12:06 AM, Dmitry Baryshkov wrote: >> On Thu, 11 Jan 2024 at 17:31, Jie Luo wrote: > >>>=20 >>>>=20 >>>>> + reg =3D <0x3a000000 0xb00000>; >>>>> + #address-cells =3D <1>; >>>>> + #size-cells =3D <1>; >>>>> + ranges; >>>>=20 >>>> Put after reg=2E >>> Ok=2E >>>=20 >>>>=20 >>>>> + status =3D "okay"; >>>>=20 >>>> Drop >>> Ok=2E >>>=20 >>>>=20 >>>> All of above comments apply to your entire patchset and all places=2E >>>>=20 >>>> Looking at code further, it does not look like suitable for mainline, >>>> but copy of downstream code=2E That's not what we expect upstream=2E = Please >>>> go back to your bindings first=2E Also, I really insist you reaching = out >>>> to other folks to help you in this process=2E >>>>=20 >>>> Best regards, >>>> Krzysztof >>>>=20 >>> We will do internal review of the gaps and update the patches as per >>> your comments=2E >>>=20 >>> Thanks for the review comments=2E >>=20 >> From the first glance, the bindings do not follow upstream principles= =2E >> You have all the settings (tdm, port config, etc) in the DT, while >> they should instead go to the driver=2E Well, unless you expect that th= e >> board might need to override them=2E >>=20 >Hi Dmitry, >The TDM configuration varies per SoC type, since the ethernet port capabi= lities of the SoCs vary=2E So we will have two different TDM configurations= for IPQ5332 and IPQ9574 SoC=2E The driver also will >need to support future SoC, so we choose to configure this from the DTSI= =2E The same reason applies to the port scheduler config as well=2E If it differs from SoC to SoC only, it goes to the driver=2E Point=2E No o= ther options=2E Thank you=2E > >Thanks for review comments=2E