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charset=UTF-8 Content-Transfer-Encoding: 7bit On 15/01/2024 07:03, Xu Yang wrote: > >> Subject: [PATCH v2 1/4] dt-bindings: perf: fsl-imx-ddr: Add i.MX95 compatible >> >> i.MX95 has a DDR pmu. This will add a compatible for it. >> >> Signed-off-by: Xu Yang >> >> --- >> Changes in v2: >> - no changes >> --- >> Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml b/Documentation/devicetree/bindings/perf/fsl- >> imx-ddr.yaml >> index e9fad4b3de68..1bc7bf1c8368 100644 >> --- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml >> +++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml >> @@ -20,6 +20,7 @@ properties: >> - fsl,imx8mn-ddr-pmu >> - fsl,imx8mp-ddr-pmu >> - fsl,imx93-ddr-pmu >> + - fsl,imx95-ddr-pmu >> - items: >> - enum: >> - fsl,imx8mm-ddr-pmu >> -- >> 2.34.1 > > A gentle ping. What do you mean? Weren't you asked to fix things, were you? Why do you ping then? Best regards, Krzysztof