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Date: Tue, 16 Jan 2024 09:36:14 +0000
From: Conor Dooley <conor.dooley@microchip.com>
To: Devarsh Thakkar <devarsht@ti.com>
CC: Conor Dooley <conor@kernel.org>, <jyri.sarha@iki.fi>,
	<tomi.valkeinen@ideasonboard.com>, <airlied@gmail.com>, <daniel@ffwll.ch>,
	<maarten.lankhorst@linux.intel.com>, <mripard@kernel.org>,
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	<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
	<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
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	<vigneshr@ti.com>, <a-bhatia1@ti.com>, <j-luthra@ti.com>, <kristo@kernel.org>
Subject: Re: [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add support for
 common1 region
Message-ID: <20240116-unrobed-cornflake-b19d4c8eb6f6@wendy>
References: <20240115125716.560363-1-devarsht@ti.com>
 <20240115125716.560363-2-devarsht@ti.com>
 <20240115-craftsman-capricorn-d2930678c222@spud>
 <060358d6-ade1-b84e-4550-e2ae34a6d53c@ti.com>
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On Tue, Jan 16, 2024 at 02:43:25PM +0530, Devarsh Thakkar wrote:
> Hi Conor,
>=20
> Thanks for the review.
>=20
> On 15/01/24 21:47, Conor Dooley wrote:
> > On Mon, Jan 15, 2024 at 06:27:15PM +0530, Devarsh Thakkar wrote:
> >> TI keystone display subsystem present in AM65 and other SoCs such as A=
M62
> >=20
> > Do all 3 SoCs supported by this binding (am625 am62a7 am65x) have this
> > common1 register? If not, you should limit it the platforms that do have
> > it.
> >=20
>=20
> Yes all 3 SoCs supported by binding have common1 register space supported.

Okay, thanks.

Acked-by: Conor Dooley <conor.dooley@microchip.com>

Cheers,
Conor.

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