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Tue, 16 Jan 2024 01:45:25 -0800 (PST) Received: from eldfell ([194.136.85.206]) by smtp.gmail.com with ESMTPSA id a6-20020ac25206000000b0050ee78fd23esm1404395lfl.262.2024.01.16.01.45.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jan 2024 01:45:25 -0800 (PST) Date: Tue, 16 Jan 2024 11:45:22 +0200 From: Pekka Paalanen To: =?UTF-8?B?QW5kcsOp?= Almeida Cc: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, kernel-dev@igalia.com, alexander.deucher@amd.com, christian.koenig@amd.com, Simon Ser , daniel@ffwll.ch, Daniel Stone , 'Marek =?UTF-8?B?T2zFocOhayc=?= , Dave Airlie , ville.syrjala@linux.intel.com, Xaver Hugl Subject: Re: [PATCH 0/2] drm/atomic: Allow drivers to write their own plane check for async Message-ID: <20240116114522.5b83d8b6@eldfell> In-Reply-To: <20240116045159.1015510-1-andrealmeid@igalia.com> References: <20240116045159.1015510-1-andrealmeid@igalia.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; x86_64-pc-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; boundary="Sig_/Qpm4_L9s_xn4TQueKpnXLKx"; protocol="application/pgp-signature"; micalg=pgp-sha256 --Sig_/Qpm4_L9s_xn4TQueKpnXLKx Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Tue, 16 Jan 2024 01:51:57 -0300 Andr=C3=A9 Almeida wrote: > Hi, >=20 > AMD hardware can do more on the async flip path than just the primary pla= ne, so > to lift up the current restrictions, this patchset allows drivers to writ= e their > own check for planes for async flips. Hi, what's the userspace story for this, how could userspace know it could do m= ore? What kind of userspace would take advantage of this and in what situations? Or is this not meant for generic userspace? Thanks, pq > I'm not sure if adding something new to drm_plane_funcs is the right way = to do, > because if we want to expand the other object types (crtc, connector) we = would > need to add their own drm_XXX_funcs, so feedbacks are welcome! >=20 > Andr=C3=A9 >=20 > Andr=C3=A9 Almeida (2): > drm/atomic: Allow drivers to write their own plane check for async > flips > drm/amdgpu: Implement check_async_props for planes >=20 > .../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 30 +++++++++ > drivers/gpu/drm/drm_atomic_uapi.c | 62 ++++++++++++++----- > include/drm/drm_atomic_uapi.h | 12 ++++ > include/drm/drm_plane.h | 5 ++ > 4 files changed, 92 insertions(+), 17 deletions(-) >=20 --Sig_/Qpm4_L9s_xn4TQueKpnXLKx Content-Type: application/pgp-signature Content-Description: OpenPGP digital signature -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEEJQjwWQChkWOYOIONI1/ltBGqqqcFAmWmUDIACgkQI1/ltBGq qqeVeA//crRWJQuEXHaVAo60Oo43iWZpDJ9PFF6fFN4a0ez+KAFPjNRNo21jRuSw waL6xm/WyX46I37DXUSRZHiDD8pOrZ+/VBxoT47EWsNpCJE3muJFsLQq1Wt+htwE wL1rludAND0O63+sY4TGsyfR6EWNUg81teQoVZT+kEKDoxsJ+7eKDIgf1s7vKzT1 lv5thV2FTEAHD8zcnWons4bKpARIdtq0ZFbnkC0ycV9RzctH2ZxTgARts16DU8e9 5QmJEOYf1POkwHOCZoioBiejixLy9jPHuUw2i4ZIu07nuPncXnxMxXRPi5Y8zzJD t6X2rHBwo/ZFBlcNdXiIRCUiPoV0POeKm2Q3mjicpn+AsR6abbVoR6oNOis/SrTL jrQQ7BtP5lXCUSrsMrNErXiDwKnXkgg4ewI59HpJ7aWSrt6gXr19votpVACAeemM aTVBVdPHZxr3fdUlVOHhPqrq2+bHDU3sld6or2da8hZ1sMUNYNe1z31h55FiUpEH HL4IQ3EsqFeJbsq/3VrVY3V7PCYwSHYQb4ULl1MwqWai/oqQYgrFqTOjqcpGDq/P yXyyXWLJD7OVMkhSATZuvzow2zBYpMm0dPdYhOPSOQmKraIvvs/Sj4AkTga7Q9Jz cm3FWB4qP9H+6qBlk/coEue22ncdunJTApcIh/SI8AA0n58Dhz4= =GGuB -----END PGP SIGNATURE----- --Sig_/Qpm4_L9s_xn4TQueKpnXLKx--