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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?uUAxZeKmoSdFYu2BV0bW79Uq0438RE4kYs+Scm9Eiz7JlU/JnXJDs2/jOCMP?= =?us-ascii?Q?SfuJ/baTW276OGT2Wsz68Ub4+w2XdlmkPpji0olsCt/Lr3Kl7sbGapMbOjIg?= =?us-ascii?Q?2+OGbuPUa0L2W/m+hVxsZOVg4abSvDwy9Xt4Jur5rTMjzTBb4lTscf/OOjHt?= =?us-ascii?Q?uhKpKhbeHyGRhTUDNUcL+lN6Fuu/MtECqsxkwCHe81fp9dDd9yNuxnMBsQmb?= =?us-ascii?Q?QGpoEe2ZCkuPVEAzweAaNhYy40C1wGwPosHjfgvl7Kt/d8eEb3eZbUxFzL0G?= =?us-ascii?Q?6LhzSF2fsgxJjF4wMCFOCxMhjbb2nd7aqJRCxs74UexbgUPa6qtX4ZOMQ5SI?= =?us-ascii?Q?Za1Z/JBQeLwQGaeNk0WMsMqLALAWDoOH5odcr3joFNqZ8VgXCgedP0wKcFhG?= =?us-ascii?Q?fIX7ps1dqHeKCR37ZtUDojmhecjDqgbQKnUTp31qmk3p0YaY1FAQV25PnCmt?= =?us-ascii?Q?Ru5rYCa2mjhoeCfrik5Ps/Yts0PzVrKixc1j2EfiFdFiVXgamzXNNCAZ3lMU?= =?us-ascii?Q?sIGu6PEBK/C1948yKhf67DCYgK54XqCBZxqiXtXr1auLYu1SRnsK4uVS+u2h?= =?us-ascii?Q?QAscQZmyQiTdiKQ9oC6Z49cUxurneLY2JN1m+ftJTBZ4RjAnV52u+HXlrCFS?= =?us-ascii?Q?fYGPBb27gjFITcxBAGUfhm4bROlQc3GpLadVYdOS5ibt24imFfbTPJ3s87bA?= =?us-ascii?Q?LdZSlPlLMFjQvvjOOXsFz3byss0GX6kBoIA3oMv3ONPOPk5FDL6RmgMe7zJf?= =?us-ascii?Q?DbR5DX2zUokGX0uBmOE7SdCYeg+1TIpwg2FeYfKWoHNLk0C1c49GgdF+VId2?= =?us-ascii?Q?9cv66QtMfwS4cegDJkL5PG/yy7WyGtcfpNt1oKBiiBik1mVSToatSvs9Egx3?= =?us-ascii?Q?yVHe5hZ81f3U5P0F91O+lpnHwLHZLvM9lyLjbYczN6Te/gQYeohB+C8RqGC8?= =?us-ascii?Q?4JLfz0uqzx7kUCRLymGdDqZKcUDPZFGzP02yu24COqN6z2zrFTS8Ljeuwdc9?= =?us-ascii?Q?nvmonvEAU2ofWIpfu0aIMw2OrNkuTc2vV5++KAdKQzav8i93bjYXjakasJpm?= =?us-ascii?Q?pUmickZcoBDWH3YpCD5bRGk2EosdwA3Ki2hKGyLRLzr/Nrwb8nr+gql/fRkf?= =?us-ascii?Q?q3myO3Gmswd2IgRbQLBamlFGm1ChcqBSOLlFjw2/hELJJahuPW3Bkj15wnDb?= =?us-ascii?Q?8uLi6euZ8wAQSAyatyqNWmmAPOA9Xbd1sVm925SVMnatwJsOAnvXud4JdYzm?= =?us-ascii?Q?BBg6tAaDNfeBQMGug9dx1I9PQcNUpQEy0jTkQvPfXZAi/MKHisIAbtwNswz3?= =?us-ascii?Q?f9uIlMXBsg1mEYBaHsrYV3COZI/bHZYbqI+60TjvlNT2eXiuxjfC7DqV8vM1?= =?us-ascii?Q?fUx+Su8RHfjB+ax0WJM5ZHIVPd8kS85vByNpIMEGkCVt9E7zprACDAwa0qVc?= =?us-ascii?Q?G5vmsqqUfBppIMgydhJ1kMBJ5pcsWtbtrYiayp6WvfX5tPKdKcv2ogas6PEJ?= =?us-ascii?Q?ohkucu4/Wj0W2uzegzY4SqED2TJHx3NdjYQ0OTuUUu5GPciZQbJSTj8Ntfpe?= =?us-ascii?Q?H1MD9gah1t/8H7yJzFk=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2d414ee8-307f-4d05-53c0-08dc16e203bc X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jan 2024 22:25:16.3404 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jrEe0UPHcCT7ewhZOyNYepePnp+zbgv3gPRJCUxRPP+nQ4TVuRIaRjaI+dwTkCt73ernMmbWvuDO2tH0MS2dQg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB8673 On Tue, Jan 16, 2024 at 10:01:42PM +0100, Krzysztof Kozlowski wrote: > On 16/01/2024 21:56, Krzysztof Kozlowski wrote: > > On 16/01/2024 21:44, Frank Li wrote: > >> On Tue, Jan 16, 2024 at 09:30:24PM +0100, Krzysztof Kozlowski wrote: > >>> On 16/01/2024 20:13, Frank Li wrote: > >>>> On Tue, Jan 16, 2024 at 06:23:09PM +0000, Conor Dooley wrote: > >>>>> On Tue, Jan 16, 2024 at 12:35:44PM -0500, Frank Li wrote: > >>>>>> On Tue, Jan 16, 2024 at 09:48:08AM +0000, Conor Dooley wrote: > >>>>>>> On Tue, Jan 16, 2024 at 10:33:48AM +0100, Krzysztof Kozlowski wrote: > >>>>>>>> On 16/01/2024 10:30, Conor Dooley wrote: > >>>>>>>>> On Tue, Jan 16, 2024 at 08:24:20AM +0100, Krzysztof Kozlowski wrote: > >>>>>>>>>> On 16/01/2024 03:29, Frank Li wrote: > >>>>>>>>>>>>> Patches were accepted after discussion, what you ponit to. So I > >>>>>>>>>>>>> think everyone agree on the name 'silvaco,i3c-master-v1'. > >>>>>>>>>>>>> I plan send next version to fix auto build error. Any additional > >>>>>>>>>>>>> comments about this? > >>>>>>>>>>>> > >>>>>>>>>>>> I still do not see how did you address Rob's comment and his point is > >>>>>>>>>>>> valid. You just did not reply to it. > >>>>>>>>>>> > >>>>>>>>>>> See https://lore.kernel.org/imx/ZXCiaKfMYYShoiXK@lizhi-Precision-Tower-5810/ > >>>>>>>>>> > >>>>>>>>>> First of all, that's not the answer to Rob's email, but some other > >>>>>>>>>> thread which is 99% ignored by Rob (unless he has filters for > >>>>>>>>>> "@Rob"...). Therefore no, it does not count as valid answer. > >>>>>>>>>> > >>>>>>>>>> Second, explanation does not make sense. There is no argument granting > >>>>>>>>>> you exception from SoC specific compatibles. > >>>>>>>>> > >>>>>>>>> The patch could have been applied two months ago had Frank done as > >>>>>>>>> was requested (multiple times). I don't understand the resistance > >>>>>>>>> towards doing so given the process has taken way way longer as a result. > >>>>>>>> > >>>>>>>> I think that Rob's comment was just skipped and original master binding > >>>>>>>> was merged without addressing it. I don't want to repeat the same > >>>>>>>> process for the "target". Indeed I could point this earlier... if I only > >>>>>>>> knew that Rob pointed out that issue. > >>>>>>> > >>>>>>> Oh I think I got confused here. The context for this mail led me to > >>>>>>> think that this was still trying to push the i3c-master-v1 stuff through > >>>>>>> and I was commenting on my frustration with the resistance to applying > >>>>>>> the feedback received. I didn't realise that this was for another > >>>>>>> patch adding a target. > >>>>>>> > >>>>>>> I think you already said it, but NAK to adding any more compatibles here > >>>>>>> until the soc-specific compatible that was asked for for the imx93 is > >>>>>>> added. > >>>>>> > >>>>>> Is it okay for 'silvaco,i3c-target-imx93'? > >>> > >>> No, because imx93 is product of NXP, not Silvaco. > >>> > >>> You need regular SoC-block compatibles, just like we have for all other > >>> snps, dwc and cdns. > >> > >> "nxp,imx93-svc-i3c-target" ? > > > > Could be, now please point me to patch adding such code to DTS. I would > > like to see the real use case for it. > > Probably I was not clear enough, so let's be more precise: I think you > might have troubles pointing to such code, because it just does not > exist. It is a bit contradicting to single hardware description, because > you want to describe one hardware in two different ways, with two > different compatibles. > > Your commit msg is here empty - it says what patch is does, which is > obvious. Tells nothing about the hardware being described here, which > does not help this discussion. This would need solving as well, but main > point stays - don't add new compatibles for the same hardware, at least > not without valid reason/explanation. I can improve commt msg. It was similar PCI case (There are two work mode: root complex and endpoint). So there are two kind compatible string for it. If you think it is good for using two compatible string for two work mode of the same hardware. I can write git commit message like: dt-bindings: i3c: svc: add compatible string nxp,imx93-svc-i3c-target silvaco i3c controller is dual mode controller, which can work as master and target mode. All clock, reg, irq are the same for both mode. Add compatible string "nxp,imx93-svc-i3c-target" to let silivaco i3c controller work as target mode. Of course, alternate method to added a property "mode" to distingiush master and target mode. but old "silvaco,i3c-master-v1" will actually work as dual mode support. Driver structure will become complex. Frank > > Best regards, > Krzysztof >