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References: <20240116204103.29318-1-twoerner@gmail.com> <20240116204103.29318-2-twoerner@gmail.com>
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Reply-To: wens@csie.org
From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 17 Jan 2024 12:38:39 +0800
Message-ID: <CAGb2v67KfNR_U_Qz85aqY1D0DKE9mo-X_L8MGvT7cdcZGUHVUg@mail.gmail.com>
Subject: Re: [PATCH 2/2] arm64: dts: rockchip: rock-pi-e: fix location of snps properties
To: Trevor Woerner <twoerner@gmail.com>
Cc: linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, 
	Heiko Stuebner <heiko@sntech.de>, devicetree@vger.kernel.org, 
	linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org
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On Wed, Jan 17, 2024 at 4:41=E2=80=AFAM Trevor Woerner <twoerner@gmail.com>=
 wrote:
>
> A number of snps (Synopsys) properties are not in their correct location.

Nope. If you read the snps,dwmac.yaml binding file, you'll see that these
properties have been deprecated. They are properties pertaining to the PHY
and should be described under the PHY node. Support for reset GPIOs on PHY
devices in phylib has been there since v4.16. The snps prefixed properties
were deprecated in v5.3.

ChenYu

> Fixes: b918e81f2145 ("arm64: dts: rockchip: rk3328: Add Radxa ROCK Pi E")
> Signed-off-by: Trevor Woerner <twoerner@gmail.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts b/arch/arm=
64/boot/dts/rockchip/rk3328-rock-pi-e.dts
> index 096cfa19036e..0739b8fec86e 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts
> @@ -150,8 +150,11 @@ &gmac2io {
>         phy-mode =3D "rgmii";
>         phy-supply =3D <&vcc_io>;
>         pinctrl-names =3D "default";
> -       pinctrl-0 =3D <&rgmiim1_pins>;
> +       pinctrl-0 =3D <&rgmiim1_pins>, <&eth_phy_reset_pin>;
>         snps,aal;
> +       snps,reset-gpio =3D <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
> +       snps,reset-active-low;
> +       snps,reset-delays-us =3D <0 10000 50000>;
>         snps,rxpbl =3D <0x4>;
>         snps,txpbl =3D <0x4>;
>         tx_delay =3D <0x26>;
> @@ -165,13 +168,10 @@ mdio {
>
>                 rtl8211: ethernet-phy@1 {
>                         reg =3D <1>;
> -                       pinctrl-0 =3D <&eth_phy_int_pin>, <&eth_phy_reset=
_pin>;
> +                       pinctrl-0 =3D <&eth_phy_int_pin>;
>                         pinctrl-names =3D "default";
>                         interrupt-parent =3D <&gpio1>;
>                         interrupts =3D <24 IRQ_TYPE_LEVEL_LOW>;
> -                       reset-assert-us =3D <10000>;
> -                       reset-deassert-us =3D <50000>;
> -                       reset-gpios =3D <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
>                 };
>         };
>  };
> --
> 2.43.0.76.g1a87c842ece3
>