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[147.75.48.161]) by mx.google.com with ESMTPS id jo2-20020a056a00908200b006dabdfabe16si1386055pfb.400.2024.01.17.02.33.33 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jan 2024 02:33:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-28844-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161; Authentication-Results: mx.google.com; dkim=pass header.i=@arinc9.com header.s=gm1 header.b=odZPxLwN; arc=pass (i=1 spf=pass spfdomain=arinc9.com dkim=pass dkdomain=arinc9.com dmarc=pass fromdomain=arinc9.com); spf=pass (google.com: domain of linux-kernel+bounces-28844-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-28844-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=arinc9.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id F3C85B25218 for ; Wed, 17 Jan 2024 10:31:55 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 717B61F946; Wed, 17 Jan 2024 10:29:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b="odZPxLwN" Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84DC81F5E4; Wed, 17 Jan 2024 10:29:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705487370; cv=none; b=LxS0++HTPFpRaivkMto1/2ZWiC46LOWw2mzx8Q/xWjieLNCMh1MSzE13TuSA+9fWLFU6U069BkNzQ6uK6MSkOJV/aDD0YJxq7J479uca189UTKh9kWkgWN2QvAnwIdI3d5uPbNLPl/8OHP3jONA61VIy3aPm7+Gu3c7RAfMCiVI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705487370; c=relaxed/simple; bh=zibi+CeC2wCZfnWMWFljfdRRLPyrlidazTLAzNP54qg=; h=Received:DKIM-Signature:From:To:Cc:Subject:Date:Message-Id: X-Mailer:In-Reply-To:References:MIME-Version:Content-Type: Content-Transfer-Encoding:X-GND-Sasl; b=WH9Lj/GU/QwpC0h/OddOU6/YTidu8VnABwl8B+qcRDzaOBDvaVDoy6qbsASZUvptpf2eW5MgktChIAOeF0OzeU/x3LlY0HiQmgGhlqnY9bylim4aSn5rd+2Iwp4UW3FONCoKcHc4ah/kxWc04Edj0q0x4k5QojgFUaZu1ug3cTs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com; spf=pass smtp.mailfrom=arinc9.com; dkim=pass (2048-bit key) header.d=arinc9.com header.i=@arinc9.com header.b=odZPxLwN; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arinc9.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arinc9.com Received: by mail.gandi.net (Postfix) with ESMTPSA id A70BF40013; Wed, 17 Jan 2024 10:29:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1705487366; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yjRrjFO9xzMYnUQXRfFaph+4p0OC+506r/Lr0Ehs5Xc=; b=odZPxLwNS/O8C6jXnSxhhJ60JjgkngWQQ/eY5wexZSegMJ5Nx0yav2PY8coodDxnMs/Eq2 47HXYcrYmnjjuFkHXKRn7TOsXmFldfzWWGkYqoEH7WUp+If83CbHWjCvqBmSiwKaOSU0LR msuhE0QcwhVqkFxGViwLveh6Iy8JyanXNXbotbGuuDXFeywUBpZwYLWXjzOoe2mzRFoEz0 OrCziaahxCiGyGuKYpsbP9jqSSyh7LY/FepZEIZeyG1+fT6g7N7FtUrJBTar4/AnAAhUzx 71u4tLme7PHMS8TFXl5L1QBCKyzFk89cy13IH+gjH5AtJh07Ei1ik2mesgOLzA== From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [RFC PATCH net-next 8/8] net: dsa: mt7530: simplify link operations and force link down on all ports Date: Wed, 17 Jan 2024 13:28:38 +0300 Message-Id: <20240117102838.57445-9-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117102838.57445-1-arinc.unal@arinc9.com> References: <20240117102838.57445-1-arinc.unal@arinc9.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-GND-Sasl: arinc.unal@arinc9.com Currently, the link operations for switch MACs are scattered across port_enable, port_disable, phylink_mac_config, phylink_mac_link_up, and phylink_mac_link_down. port_enable and port_disable clears the link settings. Move that to mt7530_setup() and mt7531_setup_common() which set up the switches. This way, the link settings are cleared on all ports at setup, and then only once with phylink_mac_link_down() when a link goes down. Force link down on all ports at setup as well. This ensures that only active ports will have their link up. Now that the bit for setting the port on force mode is done on mt7530_setup() and mt7531_setup_common(), get rid of PMCR_FORCE_MODE_ID() which helped determine which bit to use for the switch model. The "MT7621 Giga Switch Programming Guide v0.3", "MT7531 Reference Manual for Development Board v1.0", and "MT7988A Wi-Fi 7 Generation Router Platform: Datasheet (Open Version) v0.1" documents show that these bits are enabled at reset: PMCR_IFG_XMIT(1) (not part of PMCR_LINK_SETTINGS_MASK) PMCR_MAC_MODE (not part of PMCR_LINK_SETTINGS_MASK) PMCR_TX_EN PMCR_RX_EN PMCR_BACKOFF_EN (not part of PMCR_LINK_SETTINGS_MASK) PMCR_BACKPR_EN (not part of PMCR_LINK_SETTINGS_MASK) PMCR_TX_FC_EN PMCR_RX_FC_EN Remove the setting of the bits not part of PMCR_LINK_SETTINGS_MASK on phylink_mac_config as they're already set. Suggested-by: Vladimir Oltean Signed-off-by: Arınç ÜNAL --- drivers/net/dsa/mt7530.c | 30 +++++++++++++++++------------- drivers/net/dsa/mt7530.h | 2 -- 2 files changed, 17 insertions(+), 15 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index e565406d3314..53a9210513e2 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -1017,7 +1017,6 @@ mt7530_port_enable(struct dsa_switch *ds, int port, priv->ports[port].enable = true; mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, priv->ports[port].pm); - mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK); mutex_unlock(&priv->reg_mutex); @@ -1037,7 +1036,6 @@ mt7530_port_disable(struct dsa_switch *ds, int port) priv->ports[port].enable = false; mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, PCR_MATRIX_CLR); - mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK); mutex_unlock(&priv->reg_mutex); } @@ -2240,6 +2238,14 @@ mt7530_setup(struct dsa_switch *ds) mt7530_mib_reset(ds); for (i = 0; i < MT7530_NUM_PORTS; i++) { + /* Clear link settings, make all ports operate in force mode, + * and force link down on all ports. PMCR_FORCE_LNK must be + * unset to force link down. It is not modified here as it comes + * unset after reset. + */ + mt7530_clear(priv, MT7530_PMCR_P(i), PMCR_LINK_SETTINGS_MASK); + mt7530_set(priv, MT7530_PMCR_P(i), PMCR_FORCE_MODE); + /* Disable forwarding by default on all ports */ mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, PCR_MATRIX_CLR); @@ -2342,6 +2348,14 @@ mt7531_setup_common(struct dsa_switch *ds) UNU_FFP_MASK); for (i = 0; i < MT7530_NUM_PORTS; i++) { + /* Clear link settings, make all ports operate in force mode, + * and force link down on all ports. PMCR_FORCE_LNK must be + * unset to force link down. It is not modified here as it comes + * unset after reset. + */ + mt7530_clear(priv, MT7530_PMCR_P(i), PMCR_LINK_SETTINGS_MASK); + mt7530_set(priv, MT7530_PMCR_P(i), MT7531_FORCE_MODE); + /* Disable forwarding by default on all ports */ mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, PCR_MATRIX_CLR); @@ -2640,23 +2654,13 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, const struct phylink_link_state *state) { struct mt7530_priv *priv = ds->priv; - u32 mcr_cur, mcr_new; if ((port == 5 || port == 6) && priv->info->mac_port_config) priv->info->mac_port_config(ds, port, mode, state->interface); - mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); - mcr_new = mcr_cur; - mcr_new &= ~PMCR_LINK_SETTINGS_MASK; - mcr_new |= PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | PMCR_BACKOFF_EN | - PMCR_BACKPR_EN | PMCR_FORCE_MODE_ID(priv->id); - /* Are we connected to external phy */ if (port == 5 && dsa_is_user_port(ds, 5)) - mcr_new |= PMCR_EXT_PHY; - - if (mcr_new != mcr_cur) - mt7530_write(priv, MT7530_PMCR_P(port), mcr_new); + mt7530_set(priv, MT7530_PMCR_P(port), PMCR_EXT_PHY); } static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port, diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index caae48703547..beda61263e0d 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -304,8 +304,6 @@ enum mt7530_vlan_port_acc_frm { MT7531_FORCE_DPX | \ MT7531_FORCE_RX_FC | \ MT7531_FORCE_TX_FC) -#define PMCR_FORCE_MODE_ID(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ - MT7531_FORCE_MODE : PMCR_FORCE_MODE) #define PMCR_LINK_SETTINGS_MASK (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \ PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \ PMCR_TX_FC_EN | PMCR_RX_FC_EN | \ -- 2.40.1