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Wed, 17 Jan 2024 12:07:15 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 40HC6wIh002523 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 17 Jan 2024 12:06:58 GMT Received: from [10.131.33.37] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 17 Jan 2024 04:06:55 -0800 Message-ID: <674d8057-94b1-2e8a-a3ce-d8719e978298@quicinc.com> Date: Wed, 17 Jan 2024 17:36:52 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 0/3] firmware: arm_scmi: Register and handle limits change notification Content-Language: en-US To: Cristian Marussi CC: , , , , , , , References: <20240108140118.1596-1-quic_sibis@quicinc.com> From: Sibi Sankar In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: bxvcGTIC7OcA3Hn2rsZKKOjFdCxbmhMp X-Proofpoint-GUID: bxvcGTIC7OcA3Hn2rsZKKOjFdCxbmhMp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_06,2024-01-17_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 mlxlogscore=704 mlxscore=0 impostorscore=0 phishscore=0 adultscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401170087 On 1/17/24 15:11, Cristian Marussi wrote: > On Mon, Jan 08, 2024 at 07:31:15PM +0530, Sibi Sankar wrote: >> This series registers for scmi limits change notifications and adds >> perf_notify_support/perf_opp_xlate interfaces which are used by the >> scmi cpufreq driver to determine the throttled frequency and apply HW >> pressure. >> > > Hi, > > a few initial remarks from the mere SCMI standpoint. > > Unlinke most SCMI protocols that expose domains info bits via an > *info_get protocol operation, PERF does no do this since (till now) there > wasn't a compelling reason (i.e. users) > > Ulf recently in his GenPD/SCMI series recently started exposing something > and now you need to expose even more, adding also a new xlate ops. > > For the sake of simplicity, I think that we could now expose straight > away the whole perf_domain_info and embedded structs via the usual *info_get. > > After having done that, you can just drop your patch 1 and 2 since you > can access the needed info from the cpufreq_driver right away. > > Having said, I have already such patch ready (for my internal testing), I > wll post it by the end of week after a minor cleanup, if you can bear with me. > > Thoughts ? Ack, just from the naming I initially thought info_get would include everything but it just exposed minimal info. We certainly don't want to keep adding very similar ops just to expose more such info. I'll re-send the remainder of the series after you are done with your patches. Thanks. -Sibi > > Thanks, > Cristian