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From: Amit Singh Tomar <amitsinght@marvell.com>
To: <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>
CC: <fenghua.yu@intel.com>, <reinette.chatre@intel.com>, <james.morse@arm.com>,
        <gcherian@marvell.com>, <robh@kernel.org>, <peternewman@google.com>,
        <dfustini@baylibre.com>, <jonathan.cameron@huawei.com>,
        Amit Singh Tomar <amitsinght@marvell.com>
Subject: [PATCH v1 04/14] fs/resctrl: Set-up downstream priority partition resources
Date: Wed, 17 Jan 2024 19:43:55 +0530
Message-ID: <20240117141405.3063506-5-amitsinght@marvell.com>
In-Reply-To: <20240117141405.3063506-1-amitsinght@marvell.com>
References: <20240117141405.3063506-1-amitsinght@marvell.com>
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Upon resource control group creation, Cache portion bitmap, and Memory
bandwidth allocation gets initialized to the default/maximum values,
obtained from resource control code.

Let's replicate it for priority partition resource, and setup the default
downstream priority value.

Signed-off-by: Amit Singh Tomar <amitsinght@marvell.com>
---
Changes since RFC:
		* Reworked a bit to support new Schemata L3DSPRI, for
		  instance, removed the "dspri_store" flag.      		
---
 drivers/platform/mpam/mpam_resctrl.c |  1 +
 fs/resctrl/rdtgroup.c                | 21 +++++++++++++++++++++
 include/linux/resctrl.h              |  2 ++
 3 files changed, 24 insertions(+)

diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/mpam_resctrl.c
index 6fd2bfeffa0a..02efec42bbe2 100644
--- a/drivers/platform/mpam/mpam_resctrl.c
+++ b/drivers/platform/mpam/mpam_resctrl.c
@@ -735,6 +735,7 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res)
 				class->props.dspri_wd = 0x10;
 
 			r->dspri_data_width = (class->props.dspri_wd + 3) / 4;
+			r->default_dspri_ctrl = BIT_MASK(class->props.dspri_wd) - 1;
 		}
 
 		/*
diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c
index 568bb9bb7913..d57eb2c7afa7 100644
--- a/fs/resctrl/rdtgroup.c
+++ b/fs/resctrl/rdtgroup.c
@@ -3071,6 +3071,21 @@ static int rdtgroup_init_cat(struct resctrl_schema *s, u32 closid)
 	return 0;
 }
 
+/* Initialize with default downstream priority values. */
+static int rdtgroup_init_dspri(struct rdt_resource *r, u32 closid)
+{
+	struct resctrl_staged_config *cfg;
+	struct rdt_domain *d;
+
+	list_for_each_entry(d, &r->domains, list) {
+		cfg = &d->staged_config[CDP_NONE];
+		cfg->new_ctrl = r->default_dspri_ctrl;
+		cfg->have_new_ctrl = true;
+	}
+
+	return 0;
+}
+
 /* Initialize MBA resource with default values. */
 static void rdtgroup_init_mba(struct rdt_resource *r, u32 closid)
 {
@@ -3108,6 +3123,12 @@ static int rdtgroup_init_alloc(struct rdtgroup *rdtgrp)
 				return ret;
 		}
 
+		if (r->priority_cap && s->ctrl_type == SCHEMA_DSPRI) {
+			ret = rdtgroup_init_dspri(r, rdtgrp->closid);
+			if (ret < 0)
+				return ret;
+		}
+
 		ret = resctrl_arch_update_domains(r, rdtgrp->closid);
 		if (ret < 0) {
 			rdt_last_cmd_puts("Failed to initialize allocations\n");
diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
index cb17c7704fd7..93b3e3b21d5d 100644
--- a/include/linux/resctrl.h
+++ b/include/linux/resctrl.h
@@ -207,6 +207,7 @@ struct resctrl_membw {
  * @data_width:		Character width of data when displaying
  * @dspri_data_width	Character width of dspri value when displaying
  * @default_ctrl:	Specifies default cache cbm or memory B/W percent.
+ * @default_dspri_ctrl: Specifies default downstream priority value.
  * @format_str:		Per resource format string to show domain value
  * @evt_list:		List of monitoring events
  * @fflags:		flags to choose base and info files
@@ -226,6 +227,7 @@ struct rdt_resource {
 	int			data_width;
 	int                     dspri_data_width;
 	u32			default_ctrl;
+	u32                     default_dspri_ctrl;
 	const char		*format_str;
 	struct list_head	evt_list;
 	unsigned long		fflags;
-- 
2.25.1