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Wed, 17 Jan 2024 06:14:58 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 17 Jan 2024 06:14:58 -0800 Received: from localhost.localdomain (unknown [10.28.36.167]) by maili.marvell.com (Postfix) with ESMTP id D7A7D5B6931; Wed, 17 Jan 2024 06:14:54 -0800 (PST) From: Amit Singh Tomar To: , CC: , , , , , , , , Amit Singh Tomar Subject: [PATCH v1 12/14] arm_mpam: Program Downstream priority value Date: Wed, 17 Jan 2024 19:44:03 +0530 Message-ID: <20240117141405.3063506-13-amitsinght@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117141405.3063506-1-amitsinght@marvell.com> References: <20240117141405.3063506-1-amitsinght@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: zpp2hqTM8jJAkQKnD65_Nno9V8gilWRY X-Proofpoint-ORIG-GUID: zpp2hqTM8jJAkQKnD65_Nno9V8gilWRY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-17_08,2024-01-17_01,2023-05-22_02 Now that Downstream priorities values can be passed from resource control schemata file, let's program it into memory mapped Priority Partition Configuration Register. Signed-off-by: Amit Singh Tomar --- Changes since RFC: * Priority value is inverted based on DSPRI_0_IS_LOW value. --- drivers/platform/mpam/mpam_devices.c | 28 ++++++++++++++++++++++------ 1 file changed, 22 insertions(+), 6 deletions(-) diff --git a/drivers/platform/mpam/mpam_devices.c b/drivers/platform/mpam/mpam_devices.c index 9953f2050d35..388d57281fd8 100644 --- a/drivers/platform/mpam/mpam_devices.c +++ b/drivers/platform/mpam/mpam_devices.c @@ -1101,6 +1101,7 @@ static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid, struct mpam_props *rprops = &ris->props; u16 dspri = GENMASK((rprops->dspri_wd - 1), 0); u16 intpri = GENMASK((rprops->intpri_wd - 1), 0); + u8 dspri_part_0_low, dspri_rprops, dspri_cfg; lockdep_assert_held(&msc->lock); @@ -1143,18 +1144,33 @@ static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid, if (mpam_has_feature(mpam_feat_ccap_part, rprops)) mpam_write_partsel_reg(msc, CMAX, cmax); - if (mpam_has_feature(mpam_feat_intpri_part, rprops) || - mpam_has_feature(mpam_feat_dspri_part, rprops)) { + if (mpam_has_feature(mpam_feat_intpri_part, rprops)) { /* aces high? */ if (!mpam_has_feature(mpam_feat_intpri_part_0_low, rprops)) intpri = 0; - if (!mpam_has_feature(mpam_feat_dspri_part_0_low, rprops)) - dspri = 0; if (mpam_has_feature(mpam_feat_intpri_part, rprops)) pri_val |= FIELD_PREP(MPAMCFG_PRI_INTPRI, intpri); - if (mpam_has_feature(mpam_feat_dspri_part, rprops)) - pri_val |= FIELD_PREP(MPAMCFG_PRI_DSPRI, dspri); + + mpam_write_partsel_reg(msc, PRI, pri_val); + } + + dspri_rprops = mpam_has_feature(mpam_feat_dspri_part, + rprops); + dspri_part_0_low = mpam_has_feature(mpam_feat_dspri_part_0_low, + rprops); + if (dspri_rprops) { + dspri_cfg = mpam_has_feature(mpam_feat_dspri_part, + cfg); + if (dspri_cfg) { + pri_val |= (!dspri_part_0_low) + ? FIELD_PREP(MPAMCFG_PRI_DSPRI, cfg->dspri ^ dspri) + : FIELD_PREP(MPAMCFG_PRI_DSPRI, cfg->dspri & dspri); + } else { + pri_val |= (!dspri_part_0_low) + ? FIELD_PREP(MPAMCFG_PRI_DSPRI, 0) + : FIELD_PREP(MPAMCFG_PRI_DSPRI, dspri); + } mpam_write_partsel_reg(msc, PRI, pri_val); } -- 2.25.1