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b=FiHy2OqQkCvtfCwH5WYGT8rwj15GnyMvTMugpS9vX/owYxW9LJsNBl5IZioYCsy9C6 CrbxFxHegpX3d/ABVYOmzyvK9Q9V0sdvMhxmhdLGXwaG5P7JCTFMz4Vq/Hw21McV9NGm XT6Alx70QSGqiMo0IaP8jyhvPZdpu82kjIcOF+H7SG3CpsAirPxE/MhEN8Qd4CCeK5C9 2j/J0hDBSv5iK/MMJDu71UjZVKShH+fX824DFN4IabX0X8S8fm7/hKs0Z9BRaokA4w8q f+kMt62I1qG8y6/5zBnvJsqv5CsJ0WGpS9waEe9agL41bMPnFXOgipdy4tMVn84HerPx zSQw== X-Gm-Message-State: AOJu0Yz2vpl3MBjvC5LQjTc8iCBXuoVxQe51kJEF+CVx9H4FnMZGDhdW 9e1jAHcaGQIaF8kGWfiQIn91BeFzlCoJmBlAWtFcjJS0irRiksy+8XArv9QpyrYTAyG6MUksGI5 41FfoU5o+RLdv0iT+Y66oOeEBzAos2f7lU/Ay X-Received: by 2002:a17:903:24c:b0:1cc:6fa6:fb4a with SMTP id j12-20020a170903024c00b001cc6fa6fb4amr224768plh.22.1705514591692; Wed, 17 Jan 2024 10:03:11 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240117141405.3063506-1-amitsinght@marvell.com> <20240117141405.3063506-14-amitsinght@marvell.com> In-Reply-To: <20240117141405.3063506-14-amitsinght@marvell.com> From: Peter Newman Date: Wed, 17 Jan 2024 10:03:00 -0800 Message-ID: Subject: Re: [PATCH v1 13/14] arm_mpam: Handle resource instances mapped to different controls To: Amit Singh Tomar Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, fenghua.yu@intel.com, reinette.chatre@intel.com, james.morse@arm.com, gcherian@marvell.com, robh@kernel.org, dfustini@baylibre.com, jonathan.cameron@huawei.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Amit, On Wed, Jan 17, 2024 at 6:15=E2=80=AFAM Amit Singh Tomar wrote: > > +/* Club different resource properties under a class that resctrl uses, > + * for instance, L3 cache that supports both CPOR, and DSPRI need to hav= e > + * knowledge of both cpbm_wd and dspri_wd. This is needed when two contr= ols > + * are enumerated under differnt RIS Index. > + */ > +static void mpam_enable_club_class_features(struct mpam_class *class, > + struct mpam_msc_ris *ris) It looks like "club" is used as a synonym to "class" here to evade the bigger issue that mpam_classes are not defined correctly as DSPRI resources should not be in the same mpam_class as the L3 CPOR and CSU features. This hardware makes it clear that the definition of mpam_class as all resources in a (level x {memory,cache}) needs to be revised. -Peter