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(fttx-pool-217.61.151.254.bambit.de [217.61.151.254]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id CCDEC10022F; Wed, 17 Jan 2024 18:41:13 +0000 (UTC) From: Frank Wunderlich To: Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Frank Wunderlich , Sam Shih , Daniel Golle , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 0/2] Add reset controller to mt7988 infracfg Date: Wed, 17 Jan 2024 19:41:09 +0100 Message-Id: <20240117184111.62371-1-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mail-ID: df2cc20f-ff88-4040-bb30-13fca5955db2 From: Frank Wunderlich Infracfg on mt7988 supports reset controller function which is needed to get lvts thermal working. Patches are based on clk-next due to recently added mt7988 clock driver: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git changes: v3: - start resets on RST0 offset (LVTS is RST1) - rename offset constants with MT7988 prefix (else collision with reset.h) v2: - change value of constant to 0 from 9 - add missing SoB and commit-message for binding-patch Frank Wunderlich (2): dt-bindings: reset: mediatek: add MT7988 reset IDs clk: mediatek: add infracfg reset controller for mt7988 drivers/clk/mediatek/clk-mt7988-infracfg.c | 23 +++++++++++++++++++ .../reset/mediatek,mt7988-resets.h | 6 +++++ 2 files changed, 29 insertions(+) -- 2.34.1